arm: mediatek: mt7987: fix gd->bd->bi_dram[0].size

Use board_get_usable_ram_top() instead of get_effective_memsize() to
set gd->ram_top to something <= 4GiB.

Both board_get_usable_ram_top() and get_effective_memsize() are used to
set gd->ram_top in setup_dest_addr(). However, get_effective_memsize()
also sets gd->bd->bi_dram[0].size in dram_init_banksize(), which is
undesirable.

Prior to commit 56183fb025 ("arm: mediatek: mt7987: drop
dram_init_banksize()"), gd->bd->bi_dram[0].size was overridden in
a board-specific dram_init_banksize() implementation. When that was
removed get_effective_memsize() set gd->bd->bi_dram[0].size to the wrong
value because of CFG_MAX_MEM_MAPPED.

Rather than continue to use an old-style CFG_ option and the potentially
confusing overriding of gd->bd->bi_dram[0].size (it is difficult to see
which order the functions that set it are called), we can just use
board_get_usable_ram_top() to set gd->ram_top to the correct value
instead. This is possible now, thanks to LMB_LIMIT_DMA_BELOW_RAM_TOP
being set by default for 64-bit Mediatek ARM SoCs.

On mt7987, there is already an implementation of
board_get_usable_ram_top() for other reasons, so it is modified to
also limit ram_top to 4GiB (mt7987 is currently the only thing that
sets CONFIG_MTK_TZ_MOVABLE=y so it is safe to change this here without
unintentional side-effects).

The CFG_MAX_MEM_MAPPED option is removed since it is no longer needed.
The config header and Kconfig option are also removed since that was
the last CFG_ option.

Fixes: 56183fb025 ("arm: mediatek: mt7987: drop dram_init_banksize()")
Link: https://patch.msgid.link/20260615-mtk-fix-ram-size-v2-3-f72cfc52ce58@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>

arch/arm/mach-mediatek/Kconfig

@@ -199,7 +199,6 @@ config SYS_CONFIG_NAME
 	default "mt7629" if TARGET_MT7629
 	default "mt7981" if TARGET_MT7981
 	default "mt7986" if TARGET_MT7986
-	default "mt7987" if TARGET_MT7987
 	default "mt7988" if TARGET_MT7988
 	default "mt8183" if TARGET_MT8183
 	default "mt8512" if TARGET_MT8512

arch/arm/mach-mediatek/tzcfg.c

@@ -35,12 +35,13 @@ struct tz_reserved_region {
 };
 
 static bool fix_tz_region(struct tz_reserved_region region[],
-			  uint32_t used_regions)
+			  uint32_t used_regions,
+			  phys_addr_t ram_top)
 {
 	phys_addr_t size;
 
-	if (region[0].addr + region[0].size > gd->ram_top) {
-		if (region[0].addr >= gd->ram_top) {
+	if (region[0].addr + region[0].size > ram_top) {
+		if (region[0].addr >= ram_top) {
 			debug("Discarded region 0x%08llx, size 0x%llx\n",
 			      region[0].addr, region[0].size);
 
@@ -50,7 +51,7 @@ static bool fix_tz_region(struct tz_reserved_region region[],
 			return true;
 		}
 
-		size = gd->ram_top - region[0].addr;
+		size = ram_top - region[0].addr;
 
 		debug("Truncated region 0x%08llx, size 0x%llx -> 0x%llx\n",
 		      region[0].addr, region[0].size, size);
@@ -63,12 +64,15 @@ static bool fix_tz_region(struct tz_reserved_region region[],
 
 phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
-	phys_addr_t uboot_ram_top, pstore_size, uboot_size = 0;
+	phys_addr_t uboot_ram_top, ram_top, pstore_size = 0, uboot_size = 0;
 	struct tz_reserved_region region[2], tmp;
 	phys_addr_t top_addr, low_addr;
 	struct arm_smccc_res res;
 	u32 used_regions = 1;
 
+	/* ram_top must be <= 4GiB due to DMA limitations */
+	ram_top = min_t(phys_addr_t, gd->ram_top, SZ_4G);
+
 	/* BL31 region */
 	arm_smccc_smc(MTK_SIP_GET_BL31_REGION, 0, 0, 0, 0, 0, 0, 0, &res);
 	if (res.a0) {
@@ -119,14 +123,14 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 	}
 
 	debug("Effective memory @ 0x%08zx, size 0x%llx\n", gd->ram_base,
-	      gd->ram_top - gd->ram_base);
+	      ram_top - gd->ram_base);
 
 	/* Discard/fix region which is outside the effective memory */
-	if (fix_tz_region(region, used_regions)) {
+	if (fix_tz_region(region, used_regions, ram_top)) {
 		used_regions--;
 
 		if (used_regions) {
-			if (fix_tz_region(region, used_regions))
+			if (fix_tz_region(region, used_regions, ram_top))
 				used_regions--;
 		}
 	}
@@ -144,7 +148,7 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 	uboot_size += U_BOOT_MIN_STACK_SIZE + REGION_ALIGNMENT - 1;
 	uboot_size &= ~(REGION_ALIGNMENT - 1);
 
-	uboot_ram_top = gd->ram_top & ~(REGION_ALIGNMENT - 1);
+	uboot_ram_top = ram_top & ~(REGION_ALIGNMENT - 1);
 
 	if (!used_regions ||
 	    (uboot_ram_top - region[0].addr - region[0].size >= uboot_size)) {

board/mediatek/mt7987/MAINTAINERS

@@ -2,7 +2,6 @@ MT7987
 M:	Sam Shih <sam.shih@mediatek.com>
 S:	Maintained
 F:	board/mediatek/mt7987
-F:	include/configs/mt7987.h
 F:	configs/mt7987_rfb_defconfig
 F:	configs/mt7987_emmc_rfb_defconfig
 F:	configs/mt7987_sd_rfb_defconfig

include/configs/mt7987.h

@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Configuration for MediaTek MT7987 SoC
- *
- * Copyright (C) 2025 MediaTek Inc.
- * Author: Sam Shih <sam.shih@mediatek.com>
- */
-
-#ifndef __MT7987_H
-#define __MT7987_H
-
-#define CFG_MAX_MEM_MAPPED		0xC0000000
-
-#endif