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ARM: stm32mp: fix RIFSC semaphores acquisition

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Fix RIFSC semaphores acquisition by not returning an error when the
current CID already possess the semaphore. Also fix an incorrect mask
for the CID value in the SEMCR register.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This commit is contained in:
Gatien Chevallier
2025-09-18 17:20:30 +02:00
committed by Patrice Chotard
parent a209627ed7
commit bb947665f5
1 changed files with 3 additions and 2 deletions
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arch/arm/mach-stm32mp/stm32mp2/rifsc.c
+3 -2
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@@ -73,7 +73,8 @@ static int stm32_rif_acquire_semaphore(void *base, u32 id)
void *addr = base + RIFSC_RISC_PER0_SEMCR(id);
/* Check that the semaphore is available */
if (!stm32_rif_is_semaphore_available(base, id))
if (!stm32_rif_is_semaphore_available(base, id) &&
FIELD_GET(RIFSC_RISC_SCID_MASK, (readl(addr)) != RIF_CID1))
return -EACCES;
setbits_le32(addr, SEMCR_MUTEX);
@@ -171,7 +172,7 @@ static int rifsc_check_access(void *base, u32 id)
return -EACCES;
}
if (!stm32_rif_is_semaphore_available(base, id) &&
!(FIELD_GET(RIFSC_RISC_SCID_MASK, sem_reg_value) & BIT(RIF_CID1))) {
!(FIELD_GET(RIFSC_RISC_SCID_MASK, sem_reg_value) & RIF_CID1)) {
log_debug("Semaphore unavailable for peripheral %d\n", id);
return -EACCES;
}