Merge patch series "Add DM firmware reserved memory support"

Paresh Bhagat <p-bhagat@ti.com> says:

This series adds support for DM firmware reserved memory fixup in device
tree for K3 SoCs that use separate DM firmware (K3_DM_FW enabled).

The series includes:
1. Fix for phandle corruption in FDT reserved memory fixup
2. Enable OF_SYSTEM_SETUP for AM62D2 to allow device tree fixups
3. Add Kconfig options for DM firmware reserved memory for other K3 SoCs
4. Add DM reserved memory fixup implementation

The main issue being addressed is that the current reserved DDR carveout
for DM firmware in device tree is insufficient to accommodate the DM
firmware binary on AM62A7, and potentially other K3 SoCs in the future.

Currently, the size is only modified for AM62A7 SoC. For rest of SocS
existing values from device tree is taken.

For vendor boards, please verify boot and check for errors if any.

This series depends on dts update for effected devices. If "dm" node is
not found then the existing mechanism creates a new node with same
address, which cause memory overlap issue.

Link: https://lore.kernel.org/r/20260701075021.3626094-1-p-bhagat@ti.com
This commit is contained in:
Tom Rini
2026-07-16 12:05:25 -06:00
3 changed files with 46 additions and 27 deletions
+21
View File
@@ -165,6 +165,27 @@ config K3_DM_FW
bootloader, it makes RM and PM services not being available
during R5 SPL execution time.
config K3_DM_FW_RESERVED_ADDR
hex "Start address of DM firmware reserved memory region"
depends on !SOC_K3_AM642 && !SOC_K3_AM654
default 0x9c900000 if SOC_K3_AM62A7 || SOC_K3_AM62P5
default 0x9db00000 if SOC_K3_AM625
default 0xa0100000 if SOC_K3_J721E || SOC_K3_J7200 || SOC_K3_J721S2 || SOC_K3_J722S || SOC_K3_J784S4
help
Start address of the DDR region reserved for DM firmware at runtime.
Used only to fixup the kernel device-tree reserved-memory node.
config K3_DM_FW_RESERVED_SIZE
hex "Reserved memory size for DM firmware"
depends on !SOC_K3_AM642 && !SOC_K3_AM654
default 0x1f00000 if SOC_K3_AM62A7
default 0xc00000 if SOC_K3_AM625
default 0x1e00000 if TARGET_VERDIN_AM62P_A53 || TARGET_VERDIN_AM62P_R5
default 0xf00000 if SOC_K3_AM62P5 || SOC_K3_J721E || SOC_K3_J7200 || SOC_K3_J721S2 || SOC_K3_J722S || SOC_K3_J784S4
help
The runtime memory size reserved for DM firmware. This is the total
DDR span needed for the DM firmware binary.
config K3_X509_SWRV
int "SWRV for X509 certificate used for boot images"
default 1
+1
View File
@@ -54,6 +54,7 @@ config TARGET_AM62D2_A53_EVM
bool "TI K3 based AM62D2 EVM running on A53"
select ARM64
select BINMAN
select OF_SYSTEM_SETUP
imply BOARD
imply SPL_BOARD
imply TI_I2C_BOARD_DETECT
+24 -27
View File
@@ -119,7 +119,6 @@ static int fdt_fixup_reserved_memory(void *blob, const char *name,
unsigned int new_size)
{
int nodeoffset, subnode;
int ret;
struct fdt_memory carveout = {
.start = new_address,
};
@@ -129,43 +128,27 @@ static int fdt_fixup_reserved_memory(void *blob, const char *name,
if (nodeoffset < 0)
goto add_carveout;
/* Find existing matching subnode and remove it */
/* Find existing matching subnode and update it in place */
fdt_for_each_subnode(subnode, blob, nodeoffset) {
const char *node_name;
fdt_addr_t addr;
fdt_size_t size;
u64 reg[2];
/* Name matching */
node_name = fdt_get_name(blob, subnode, NULL);
if (!name)
return -EINVAL;
if (!strncmp(node_name, name, strlen(name))) {
/* Read out old size first */
addr = fdtdec_get_addr_size_auto_parent(
blob, nodeoffset, subnode, "reg", 0, &size,
false);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
new_size = size;
/* Delete node */
ret = fdt_del_node(blob, subnode);
if (ret < 0)
return ret;
/* Only one matching node */
break;
/* Update the reg property in place */
reg[0] = cpu_to_fdt64(new_address);
reg[1] = cpu_to_fdt64(new_size);
return fdt_setprop(blob, subnode, "reg", reg, sizeof(reg));
}
}
add_carveout:
carveout.end = new_address + new_size - 1;
ret = fdtdec_add_reserved_memory(blob, name, &carveout, NULL, 0, NULL,
return fdtdec_add_reserved_memory(blob, name, &carveout, NULL, 0, NULL,
FDTDEC_RESERVED_MEMORY_NO_MAP);
if (ret < 0)
return ret;
return 0;
}
int fdt_fixup_reserved(void *blob)
@@ -177,9 +160,23 @@ int fdt_fixup_reserved(void *blob)
if (ret)
return ret;
return fdt_fixup_reserved_memory(blob, "optee",
CONFIG_K3_OPTEE_LOAD_ADDR,
CONFIG_K3_OPTEE_RESERVED_SIZE);
ret = fdt_fixup_reserved_memory(blob, "optee",
CONFIG_K3_OPTEE_LOAD_ADDR,
CONFIG_K3_OPTEE_RESERVED_SIZE);
if (ret)
return ret;
#if defined(CONFIG_K3_DM_FW_RESERVED_ADDR) && defined(CONFIG_K3_DM_FW_RESERVED_SIZE)
ret = fdt_fixup_reserved_memory(blob, "dm",
CONFIG_K3_DM_FW_RESERVED_ADDR,
CONFIG_K3_DM_FW_RESERVED_SIZE);
if (ret)
return ret;
#endif
return 0;
}
static int fdt_fixup_critical_trips(void *blob, int zoneoffset, int maxc)