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configs: socfpga: soc64: agilex5: Enable QSPI boot with UBI / UBIFS

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Add the required configuration in the U-Boot env to enable Linux QSPI
boot with UBI / UBIFS.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
This commit is contained in:
Alif Zakuan Yuslaimi
2025-02-25 10:54:04 -06:00
committed by Tom Rini
parent d1be524aac
commit 9f12a3265c
2 changed files with 7 additions and 0 deletions
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configs/socfpga_agilex5_defconfig
+1
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@@ -37,6 +37,7 @@ CONFIG_SPL_SYS_MALLOC_SIZE=0x500000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_CACHE=y
CONFIG_SPL_SPI_FLASH_MTD=y
CONFIG_SPL_MTD=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x04000000
CONFIG_SPL_ATF=y
include/configs/socfpga_soc64_common.h
+6
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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0
*
* Copyright (C) 2017-2024 Intel Corporation <www.intel.com>
* Copyright (C) 2025 Altera Corporation <www.altera.com>
*
*/
@@ -56,6 +57,11 @@
#define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \
"bootcmd_qspi=ubi detach; sf probe && " \
"setenv mtdids 'nor0=nor0,nand0=nand.0' && " \
"setenv mtdparts 'mtdparts=nor0:66m(u-boot),190m(root); " \
"nand.0:2m(nand_uboot),500m(nand_root)' && " \
"env select UBI; saveenv && " \
"ubi part root && " \
"if ubi part root && ubi readvol ${scriptaddr} script; " \
"then echo QSPI: Running script from UBIFS; " \
"elif sf read ${scriptaddr} ${qspiscriptaddr} ${scriptsize}; " \