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Merge tag 'u-boot-rockchip-2026.10-20260710' of https://git.u-boot-project.org/u-boot/custodians/u-boot-rockchip

Browse Source 
CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-rockchip/-/pipelines/597

- Add new rockchip custodian,
- Remove inactive rockchip custodian,
- Preemptively fix rk3528/rk356x DTS issue that will come with 7.1
  upstream DTS sync,
- Fix typo in doc,
- Fix variable used before being set in rockchip_nfc,
- Fix asm-operand-widths clang warning for RK3528, RK3576 and RK3588,
- Work around HW undefined state for NVMEs on RK3588 Jaguar,
- Added support for new devices:
  - LinkEase EasePi R1
  - 9Tripod X3568 v4
This commit is contained in:
Tom Rini
2026-07-10 10:04:04 -06:00
parent 5a7117b0a2 b5deaa71fb
commit 9652e00aaa
13 changed files with 229 additions and 49 deletions
Download Patch File Download Diff File Expand all files Collapse all files
MAINTAINERS
+18 -28
View File
@@ -555,45 +555,35 @@ F: drivers/usb/host/xhci-rcar*
ARM ROCKCHIP
M: Simon Glass <sjg@chromium.org>
M: Philipp Tomsich <philipp.tomsich@vrull.eu>
M: Quentin Schulz <u-boot@0leil.net>
M: Kever Yang <kever.yang@rock-chips.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-rockchip.git
F: arch/arm/dts/px30*
F: arch/arm/dts/rk3*
F: arch/arm/dts/rockchip*
F: arch/arm/dts/rv11*
F: arch/arm/include/asm/arch-rockchip/
F: arch/arm/mach-rockchip/
F: board/amarula/vyasa-rk3288/
F: board/anbernic/rgxx3_rk3566/
F: board/armsom/sige7-rk3588/
F: board/chipspark/popmetal_rk3288
F: board/engicam/px30_core/
F: board/firefly/
F: board/mqmaker/miqi_rk3288/
F: board/phytec/phycore_rk3288
F: board/pine64
# Exclude from N: px5 matches
X: configs/kmsupx5_defconfig
N: px30
N: px5
# RK3xxx SoC family
N: rk3
# RK8xx PMIC/regulator family
N: rk8
N: rkmtd
N: rockchip
N: rockusb
# RV11xx SoC family
N: rv11
F: board/radxa/
F: board/rockchip/
F: board/theobroma-systems
F: board/vamrs/rock960_rk3399/
F: drivers/clk/rockchip/
F: drivers/gpio/rk_gpio.c
F: drivers/misc/rockchip-efuse.c
F: drivers/mmc/rockchip_sdhci.c
F: drivers/mmc/rockchip_dw_mmc.c
F: drivers/pinctrl/rockchip/
F: drivers/ram/rockchip/
F: drivers/sysreset/sysreset_rockchip.c
F: drivers/ufs/*rockchip*
F: drivers/video/rockchip/
F: drivers/i2c/rk_i2c.c
F: drivers/pwm/rk_pwm.c
F: drivers/spi/rk_spi.[ch]
F: tools/rkcommon.c
F: tools/rkcommon.h
F: tools/rkimage.c
F: tools/rkmux.py
F: tools/rksd.c
F: tools/rkspi.c
N: rockchip
ARM SAMSUNG
M: Minkyu Kang <mk7.kang@samsung.com>
arch/arm/dts/rk3528-u-boot.dtsi
+1 -1
View File
@@ -23,7 +23,7 @@
reg = <0x0 0xffc50000 0x0 0x200>;
};
otp: nvmem@ffce0000 {
otp: efuse@ffce0000 {
compatible = "rockchip,rk3528-otp";
reg = <0x0 0xffce0000 0x0 0x4000>;
};
arch/arm/dts/rk356x-u-boot.dtsi
+1 -7
View File
@@ -21,15 +21,9 @@
bootph-all;
};
otp: nvmem@fe38c000 {
otp: efuse@fe38c000 {
compatible = "rockchip,rk3568-otp";
reg = <0x0 0xfe38c000 0x0 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
cpu_id: id@a {
reg = <0x0a 0x10>;
};
};
};
arch/arm/dts/rk3588-jaguar-u-boot.dtsi
+6
View File
@@ -21,6 +21,12 @@
bootph-some-ram;
};
&gpio0 {
/* Need gpio0 in SPL for spl_board_init() to control GPIO0_D0 */
/* TODO: once we have a U-Boot TPL, use bootph-pre-sram; */
bootph-pre-ram;
};
&gpio2 {
bootph-pre-ram;
bootph-some-ram;
arch/arm/mach-rockchip/rk3528/rk3528.c
+1 -1
View File
@@ -95,7 +95,7 @@ void rockchip_stimer_init(void)
if (reg & TIMER_EN)
return;
asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY));
writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);
writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);
writel(TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);
arch/arm/mach-rockchip/rk3576/rk3576.c
+1 -1
View File
@@ -131,7 +131,7 @@ void rockchip_stimer_init(void)
if (reg & TIMER_EN)
return;
asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY));
writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);
writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);
writel((TIMER_EN << 16) | TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);
arch/arm/mach-rockchip/rk3588/rk3588.c
+1 -1
View File
@@ -167,7 +167,7 @@ void rockchip_stimer_init(void)
if (reg & TIMER_EN)
return;
asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY));
writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);
writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);
writel(TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);
board/rockchip/evb_rk3568/MAINTAINERS
+10
View File
@@ -1,9 +1,19 @@
9TRIPOD-X3568-V4
M: Coia Prant <coiaprant@gmail.com>
S: Maintained
F: configs/9tripod-x3568-v4-rk3568_defconfig
BANANAPI-BPI-R2-PRO
M: Frank Wunderlich <frank-w@public-files.de>
S: Maintained
F: configs/bpi-r2-pro-rk3568_defconfig
F: arch/arm/dts/rk3568-bpi-r2-pro*
EASEPI-R1
M: Liangbin Lian <jjm2473@gmail.com>
S: Maintained
F: configs/easepi-r1-rk3568_defconfig
EVB-RK3568
M: Joseph Chen <chenjh@rock-chips.com>
S: Maintained
board/theobroma-systems/jaguar_rk3588/jaguar_rk3588.c
+20
View File
@@ -54,6 +54,8 @@ int rockchip_early_misc_init_r(void)
#define GPIO0B7_PU_EN BIT(15)
#define M2_NVME_PERSTN 24 /* GPIO0_D0, PERSTN signal to the M.2 NVMe slot */
void spl_board_init(void)
{
/*
@@ -67,6 +69,24 @@ void spl_board_init(void)
* pull-up.
*/
struct rk3588_pmu2_ioc * const ioc = (void *)PMU2_IOC_BASE;
int ret;
/* TODO: once we have a U-Boot TPL, move this to tpl_board_init() */
rk_setreg(&ioc->gpio0b_p, GPIO0B7_PU_EN);
/*
* Set the M.2 NVMe slot PERSTN to a defined low
* state as early as possible
*/
ret = gpio_request(M2_NVME_PERSTN, "M2_NVME_PERSTN");
if (ret) {
log_err("M2_NVME_PERSTN: gpio request failed: %d\n", ret);
return;
}
ret = gpio_direction_output(M2_NVME_PERSTN, 0);
if (ret) {
log_err("M2_NVME_PERSTN: gpio direction set failed: %d\n", ret);
return;
}
}
configs/9tripod-x3568-v4-rk3568_defconfig
+76
View File
@@ -0,0 +1,76 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-9tripod-x3568-v4"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART_BASE=0xFE660000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-9tripod-x3568-v4.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_SYSCON=y
CONFIG_AHCI=y
CONFIG_DWC_AHCI=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
CONFIG_PHY_MOTORCOMM=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_ERRNO_STR=y
configs/easepi-r1-rk3568_defconfig
+82
View File
@@ -0,0 +1,82 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-easepi-r1"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART_BASE=0xFE660000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-easepi-r1.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
CONFIG_RTL8169=y
CONFIG_PHY_REALTEK=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_SPL_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y
doc/board/rockchip/rockchip.rst
+3 -1
View File
@@ -126,6 +126,7 @@ List of mainline supported Rockchip boards:
- Xunlong Orange Pi 3B (orangepi-3b-rk3566)
* rk3568
- 9Tripod X3568 v4 (9tripod-x3568-v4-rk3568)
- Rockchip Evb-RK3568 (evb-rk3568)
- Banana Pi BPI-R2 Pro (bpi-r2-pro-rk3568)
- EmbedFire LubanCat 2 (lubancat-2-rk3568)
@@ -133,6 +134,7 @@ List of mainline supported Rockchip boards:
- FriendlyElec NanoPi R5S (nanopi-r5s-rk3568)
- Generic RK3566/RK3568 (generic-rk3568)
- Hardkernel ODROID-M1 (odroid-m1-rk3568)
- LinkEase EasePi R1 (easepi-r1-rk3568)
- Lunzn FastRhino R66S (fastrhino-r66s-rk3568)
- QNAP TS-433 (qnap-ts433-rk3568)
- Radxa E25 Carrier Board (radxa-e25-rk3568)
@@ -248,7 +250,7 @@ To build rk3288 boards:
.. code-block:: bash
make evb-rk3288-mk808_defconfig
make evb-rk3288-rk808_defconfig
make CROSS_COMPILE=arm-linux-gnueabihf-
To build rk3308 boards:
drivers/mtd/nand/raw/rockchip_nfc.c
+9 -9
View File
@@ -861,6 +861,15 @@ static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip)
ecc->steps = mtd->writesize / ecc->size;
ecc->bytes = DIV_ROUND_UP(ecc->strength * fls(8 * chip->ecc.size), 8);
rknand->metadata_size = NFC_SYS_DATA_SIZE * ecc->steps;
if (rknand->metadata_size < NFC_SYS_DATA_SIZE + 2) {
dev_err(nfc->dev,
"driver needs at least %d bytes of meta data\n",
NFC_SYS_DATA_SIZE + 2);
return -EIO;
}
if (ecc->bytes * ecc->steps > mtd->oobsize - rknand->metadata_size)
return -EINVAL;
@@ -974,15 +983,6 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc *nfc, int devnum)
ret = ofnode_read_u32(node, "rockchip,boot-ecc-strength", &tmp);
rknand->boot_ecc = ret ? ecc->strength : tmp;
rknand->metadata_size = NFC_SYS_DATA_SIZE * ecc->steps;
if (rknand->metadata_size < NFC_SYS_DATA_SIZE + 2) {
dev_err(dev,
"driver needs at least %d bytes of meta data\n",
NFC_SYS_DATA_SIZE + 2);
return -EIO;
}
if (!nfc->page_buf) {
nfc->page_buf = kzalloc(NFC_MAX_PAGE_SIZE, GFP_KERNEL);
if (!nfc->page_buf) {