mtd: rawnand: macronix: OTP access for MX30LFxG18AC
Support for OTP area access on MX30LFxG18AC chip series. Link: https://lore.kernel.org/all/20231130112405.92196-1-avkrasnov@salutedevices.com Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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committed by
Dario Binacchi
parent
2248c96ea1
commit
9119570eee
@@ -16,13 +16,183 @@
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* GNU General Public License for more details.
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*/
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#include <dm/device_compat.h>
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#include <linux/mtd/rawnand.h>
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#define ONFI_FEATURE_ADDR_30LFXG18AC_OTP 0x90
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#define MACRONIX_30LFXG18AC_OTP_START_PAGE 2
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#define MACRONIX_30LFXG18AC_OTP_PAGES 30
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#define MACRONIX_30LFXG18AC_OTP_PAGE_SIZE 2112
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#define MACRONIX_30LFXG18AC_OTP_SIZE_BYTES \
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(MACRONIX_30LFXG18AC_OTP_PAGES * \
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MACRONIX_30LFXG18AC_OTP_PAGE_SIZE)
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#define MACRONIX_30LFXG18AC_OTP_EN BIT(0)
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static int macronix_30lfxg18ac_get_otp_info(struct mtd_info *mtd, size_t len,
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size_t *retlen,
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struct otp_info *buf)
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{
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if (len < sizeof(*buf))
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return -EINVAL;
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/* Always report that OTP is unlocked. Reason is that this
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* type of flash chip doesn't provide way to check that OTP
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* is locked or not: subfeature parameter is implemented as
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* volatile register. Technically OTP region could be locked
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* and become readonly, but as there is no way to check it,
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* don't allow to lock it ('_lock_user_prot_reg' callback
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* always returns -EOPNOTSUPP) and thus we report that OTP
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* is unlocked.
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*/
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buf->locked = 0;
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buf->start = 0;
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buf->length = MACRONIX_30LFXG18AC_OTP_SIZE_BYTES;
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*retlen = sizeof(*buf);
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return 0;
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}
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static int macronix_30lfxg18ac_otp_enable(struct nand_chip *nand)
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{
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u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 };
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struct mtd_info *mtd;
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mtd = nand_to_mtd(nand);
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feature_buf[0] = MACRONIX_30LFXG18AC_OTP_EN;
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return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf);
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}
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static int macronix_30lfxg18ac_otp_disable(struct nand_chip *nand)
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{
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u8 feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 };
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struct mtd_info *mtd;
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mtd = nand_to_mtd(nand);
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return nand->onfi_set_features(mtd, nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP, feature_buf);
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}
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static int __macronix_30lfxg18ac_rw_otp(struct mtd_info *mtd,
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loff_t offs_in_flash,
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size_t len, size_t *retlen,
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u_char *buf, bool write)
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{
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struct nand_chip *nand;
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size_t bytes_handled;
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off_t offs_in_page;
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u64 page;
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int ret;
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nand = mtd_to_nand(mtd);
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nand->select_chip(mtd, 0);
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ret = macronix_30lfxg18ac_otp_enable(nand);
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if (ret)
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goto out_otp;
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page = offs_in_flash;
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/* 'page' will be result of division. */
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offs_in_page = do_div(page, MACRONIX_30LFXG18AC_OTP_PAGE_SIZE);
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bytes_handled = 0;
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while (bytes_handled < len &&
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page < MACRONIX_30LFXG18AC_OTP_PAGES) {
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size_t bytes_to_handle;
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u64 phys_page = page + MACRONIX_30LFXG18AC_OTP_START_PAGE;
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bytes_to_handle = min_t(size_t, len - bytes_handled,
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MACRONIX_30LFXG18AC_OTP_PAGE_SIZE -
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offs_in_page);
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if (write)
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ret = nand_prog_page_op(nand, phys_page, offs_in_page,
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&buf[bytes_handled], bytes_to_handle);
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else
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ret = nand_read_page_op(nand, phys_page, offs_in_page,
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&buf[bytes_handled], bytes_to_handle);
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if (ret)
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goto out_otp;
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bytes_handled += bytes_to_handle;
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offs_in_page = 0;
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page++;
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}
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*retlen = bytes_handled;
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out_otp:
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if (ret)
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dev_err(mtd->dev, "failed to perform OTP IO: %i\n", ret);
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ret = macronix_30lfxg18ac_otp_disable(nand);
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if (ret)
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dev_err(mtd->dev, "failed to leave OTP mode after %s\n",
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write ? "write" : "read");
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nand->select_chip(mtd, -1);
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return ret;
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}
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static int macronix_30lfxg18ac_write_otp(struct mtd_info *mtd, loff_t to,
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size_t len, size_t *rlen,
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u_char *buf)
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{
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return __macronix_30lfxg18ac_rw_otp(mtd, to, len, rlen, (u_char *)buf,
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true);
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}
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static int macronix_30lfxg18ac_read_otp(struct mtd_info *mtd, loff_t from,
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size_t len, size_t *rlen,
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u_char *buf)
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{
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return __macronix_30lfxg18ac_rw_otp(mtd, from, len, rlen, buf, false);
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}
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static int macronix_30lfxg18ac_lock_otp(struct mtd_info *mtd, loff_t from,
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size_t len)
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{
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/* See comment in 'macronix_30lfxg18ac_get_otp_info()'. */
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return -EOPNOTSUPP;
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}
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static void macronix_nand_setup_otp(struct nand_chip *chip)
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{
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static const char * const supported_otp_models[] = {
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"MX30LF1G18AC",
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"MX30LF2G18AC",
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"MX30LF4G18AC",
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};
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int i;
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if (!chip->onfi_version ||
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!(le16_to_cpu(chip->onfi_params.opt_cmd)
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& ONFI_OPT_CMD_SET_GET_FEATURES))
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return;
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for (i = 0; i < ARRAY_SIZE(supported_otp_models); i++) {
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if (!strcmp(chip->onfi_params.model, supported_otp_models[i])) {
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struct mtd_info *mtd;
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mtd = nand_to_mtd(chip);
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mtd->_get_user_prot_info = macronix_30lfxg18ac_get_otp_info;
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mtd->_read_user_prot_reg = macronix_30lfxg18ac_read_otp;
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mtd->_write_user_prot_reg = macronix_30lfxg18ac_write_otp;
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mtd->_lock_user_prot_reg = macronix_30lfxg18ac_lock_otp;
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return;
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}
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}
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}
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static int macronix_nand_init(struct nand_chip *chip)
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{
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if (nand_is_slc(chip))
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chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
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macronix_nand_setup_otp(chip);
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return 0;
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}
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