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arm64: dts: rockchip: Add OTP device node for RK3308

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The RK3308 SoC contains a controller for one-time-programmable memory,
add a device node for it.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240521211029.1236094-9-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: 36d3bbc8cdbef2f83391f7708888265ac4c37a99 ]

(cherry picked from commit db11d284200d0f811a8f8238dbc9c63daf4e6131)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonas Karlman
2024-08-09 18:35:23 +08:00
committed by Kever Yang
parent 0bacb4d221
commit 8bf59082dd
1 changed files with 24 additions and 0 deletions
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dts/upstream/src/arm64/rockchip/rk3308.dtsi
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@@ -556,6 +556,30 @@
status = "disabled";
};
otp: efuse@ff210000 {
compatible = "rockchip,rk3308-otp";
reg = <0x0 0xff210000 0x0 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
<&cru PCLK_OTP_PHY>;
clock-names = "otp", "apb_pclk", "phy";
resets = <&cru SRST_OTP_PHY>;
reset-names = "phy";
cpu_id: id@7 {
reg = <0x07 0x10>;
};
cpu_leakage: cpu-leakage@17 {
reg = <0x17 0x1>;
};
logic_leakage: logic-leakage@18 {
reg = <0x18 0x1>;
};
};
dmac0: dma-controller@ff2c0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0xff2c0000 0x0 0x4000>;