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imx9: soc: Configure TRDC for M33 TCM access

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On OSCCA part, M33 TCM is used for ROM PATCH and protected by ELE ROM.
So after release TRDC, we need to configure TRDC for M33 TCM,
otherwise A55 can't access the TCM.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
This commit is contained in:
Ye Li
2024-09-19 00:12:41 -03:00
committed by Fabio Estevam
parent 4b34da4322
commit 7ddb2c91c1
2 changed files with 14 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/include/asm/arch-imx9/imx-regs.h
+1
View File
@@ -25,6 +25,7 @@
#define ANATOP_BASE_ADDR 0x44480000UL
#define BLK_CTRL_WAKEUPMIX_BASE_ADDR 0x42420000
#define BLK_CTRL_NS_ANOMIX_BASE_ADDR 0x44210000
#define BLK_CTRL_S_ANOMIX_BASE_ADDR 0x444f0000
#define SRC_IPS_BASE_ADDR (0x44460000)
arch/arm/mach-imx/imx9/soc.c
+13 -1
View File
@@ -792,7 +792,7 @@ int m33_prepare(void)
(struct src_general_regs *)(ulong)SRC_GLOBAL_RBASE;
struct blk_ctrl_s_aonmix_regs *s_regs =
(struct blk_ctrl_s_aonmix_regs *)BLK_CTRL_S_ANOMIX_BASE_ADDR;
u32 val;
u32 val, i;
if (m33_is_rom_kicked())
return -EPERM;
@@ -817,6 +817,18 @@ int m33_prepare(void)
/* Set ELE LP handshake for M33 reset */
setbits_le32(&s_regs->lp_handshake[0], BIT(6));
/* OSCCA enabled, reconfigure TRDC for TCM access, otherwise ECC init will raise error */
val = readl(BLK_CTRL_NS_ANOMIX_BASE_ADDR + 0x28);
if (val & BIT(0)) {
trdc_mbc_set_control(0x44270000, 1, 0, 0x6600);
for (i = 0; i < 32; i++)
trdc_mbc_blk_config(0x44270000, 1, 3, 0, i, true, 0);
for (i = 0; i < 32; i++)
trdc_mbc_blk_config(0x44270000, 1, 3, 1, i, true, 0);
}
/* Clear M33 TCM for ECC */
memset((void *)(ulong)0x201e0000, 0, 0x40000);