AMD/Xilinx changes for v2024.10-rc2

amd/xilinx:
- Enable CONFIG_MMC_SPEED_MODE_SET

env:
- support overriding spi dev from board code

clk:
- Add set_rate support for display clocks

spi:
- Describe is25lp01gg flash

zynq:
- Add support for 7z010_lr and 7z020_lr

zynqmp:
- Add support for zu1eg_lr
- Enable NFS for Kria
- DT changes
- Cleanup firmware handling in board_init()

versal-net:
- Setup spi seq number based on boot device
- dt-schema update for mini configurations

versal2:
- Disable uartlite driver
- Add support for mini configurations
- Enable NFS
This commit is contained in:
Tom Rini
2024-08-06 07:17:11 -06:00
29 changed files with 440 additions and 25 deletions
+11
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@@ -0,0 +1,11 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Empty device tree for amd-versal2-mini
*
* Copyright (C) 2024, Advanced Micro Devices, Inc.
*/
/dts-v1/;
/ {
};
+1 -1
View File
@@ -36,7 +36,7 @@
ranges;
ospi: spi@f1010000 {
compatible = "cadence,qspi", "cdns,qspi-nor";
compatible = "cdns,qspi-nor";
status = "okay";
reg = <0 0xf1010000 0 0x10000 0 0xc0000000 0 0x20000000>;
clock-names = "ref_clk", "pclk";
+2 -2
View File
@@ -42,14 +42,14 @@
bootph-all;
};
amba: amba {
amba: axi {
bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
sdhci1: sdhci@f1050000 {
sdhci1: mmc@f1050000 {
compatible = "xlnx,versal-net-emmc";
status = "okay";
non-removable;
+2 -2
View File
@@ -42,7 +42,7 @@
bootph-all;
};
amba: amba {
amba: axi {
bootph-all;
compatible = "simple-bus";
#address-cells = <0x2>;
@@ -50,7 +50,7 @@
ranges;
ospi: spi@f1010000 {
compatible = "cadence,qspi", "cdns,qspi-nor";
compatible = "cdns,qspi-nor";
status = "okay";
reg = <0 0xf1010000 0 0x10000>, <0 0xc0000000 0 0x20000000>;
clock-names = "ref_clk", "pclk";
+1 -1
View File
@@ -42,7 +42,7 @@
bootph-all;
};
amba: amba {
amba: axi {
bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
+1
View File
@@ -358,6 +358,7 @@
status = "okay";
rts-gpios = <&gpio 72 GPIO_ACTIVE_HIGH>;
linux,rs485-enabled-at-boot-time;
rs485-rts-delay = <10 10>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_default>;
assigned-clock-rates = <100000000>;
+1 -1
View File
@@ -107,7 +107,7 @@
pwm-fan {
compatible = "pwm-fan";
status = "okay";
pwms = <&ttc0 2 40000 0>;
pwms = <&ttc0 2 40000 1>;
};
};
+2
View File
@@ -1025,6 +1025,7 @@
reg = <0x0 0xff000000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&zynqmp_firmware PD_UART_0>;
resets = <&zynqmp_reset ZYNQMP_RESET_UART0>;
};
uart1: serial@ff010000 {
@@ -1036,6 +1037,7 @@
reg = <0x0 0xff010000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&zynqmp_firmware PD_UART_1>;
resets = <&zynqmp_reset ZYNQMP_RESET_UART1>;
};
usb0: usb@ff9d0000 {
+2
View File
@@ -36,9 +36,11 @@ static const struct {
} zynq_fpga_descs[] = {
ZYNQ_DESC(7Z007S),
ZYNQ_DESC(7Z010),
ZYNQ_DESC(7Z010_LR),
ZYNQ_DESC(7Z012S),
ZYNQ_DESC(7Z014S),
ZYNQ_DESC(7Z015),
ZYNQ_DESC(7Z020_LR),
ZYNQ_DESC(7Z020),
ZYNQ_DESC(7Z030),
ZYNQ_DESC(7Z035),
+45
View File
@@ -193,6 +193,51 @@ static u8 versal_net_get_bootmode(void)
return bootmode;
}
int spi_get_env_dev(void)
{
struct udevice *dev;
const char *mode = NULL;
int bootseq = -1;
switch (versal_net_get_bootmode()) {
case QSPI_MODE_24BIT:
puts("QSPI_MODE_24\n");
if (uclass_get_device_by_name(UCLASS_SPI,
"spi@f1030000", &dev)) {
debug("QSPI driver for QSPI device is not present\n");
break;
}
mode = "xspi";
bootseq = dev_seq(dev);
break;
case QSPI_MODE_32BIT:
puts("QSPI_MODE_32\n");
if (uclass_get_device_by_name(UCLASS_SPI,
"spi@f1030000", &dev)) {
debug("QSPI driver for QSPI device is not present\n");
break;
}
mode = "xspi";
bootseq = dev_seq(dev);
break;
case OSPI_MODE:
puts("OSPI_MODE\n");
if (uclass_get_device_by_name(UCLASS_SPI,
"spi@f1010000", &dev)) {
debug("OSPI driver for OSPI device is not present\n");
break;
}
mode = "xspi";
bootseq = dev_seq(dev);
break;
default:
break;
}
debug("bootseq %d\n", bootseq);
return bootseq;
}
static int boot_targets_setup(void)
{
u8 bootmode;
-13
View File
@@ -152,20 +152,7 @@ int board_init(void)
if (sizeof(CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE) > 1)
zynqmp_pmufw_load_config_object(zynqmp_pm_cfg_obj,
zynqmp_pm_cfg_obj_size);
#endif
#if defined(CONFIG_ZYNQMP_FIRMWARE)
struct udevice *dev;
uclass_get_device_by_name(UCLASS_FIRMWARE, "power-management", &dev);
if (!dev) {
uclass_get_device_by_name(UCLASS_FIRMWARE, "zynqmp-power", &dev);
if (!dev)
panic("PMU Firmware device not found - Enable it");
}
#endif
#if defined(CONFIG_SPL_BUILD)
printf("Silicon version:\t%d\n", zynqmp_get_silicon_version());
/* the CSU disables the JTAG interface when secure boot is enabled */
+6 -3
View File
@@ -63,10 +63,13 @@ kr260_setup=i2c dev 1 && run usb_hub_init; i2c dev 2 && run usb_hub_init;
kd240_setup=i2c dev 1 && run usb_hub_init;zynqmp pmufw node 33; zynqmp pmufw node 47
tpm_setup=tpm autostart;
tpm_reset=echo "!!! For TPM reset a full power cycle or pressing the POR_B button is required !!!";
tpm_kv260=if test ${card1_rev} = A -o ${card1_rev} = B -o ${card1_rev} = Y -o ${card1_rev} = Z -o ${card1_rev} = 1; then run tpm_reset; fi
tpm_kd240=if test ${card1_rev} = A; then run tpm_reset; fi
board_setup=\
zynqmp mmio_write 0xFFCA0010 0xfff 0; \
if test ${card1_name} = SCK-KV-G; then run kv260_setup; fi;\
if test ${card1_name} = SCK-KR-G; then run kr260_setup; fi;\
if test ${card1_name} = SCK-KD-G; then run kd240_setup; fi;\
if test ${card1_name} = SCK-KV-G; then run kv260_setup; run tpm_kv260; fi;\
if test ${card1_name} = SCK-KR-G; then run kr260_setup; run tpm_reset; fi;\
if test ${card1_name} = SCK-KD-G; then run kd240_setup; run tpm_kd240; fi;\
run tpm_setup
+77
View File
@@ -0,0 +1,77 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="amd_versal2_mini"
# CONFIG_ARM64_CRC32 is not set
CONFIG_COUNTER_FREQUENCY=100000000
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_VERSAL2=y
CONFIG_TEXT_BASE=0xBBF00000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=3
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xBBF20000
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="amd-versal2-mini"
CONFIG_DEBUG_UART_BASE=0xf1920000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
# CONFIG_PSCI_RESET is not set
CONFIG_SYS_LOAD_ADDR=0xBBF80000
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x00001000
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="versal2> "
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTI is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_FDT is not set
# CONFIG_CMD_GO is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
CONFIG_OF_EMBED=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_GPIO is not set
# CONFIG_I2C is not set
# CONFIG_INPUT is not set
# CONFIG_MMC is not set
# CONFIG_POWER is not set
CONFIG_DEBUG_UART_PL011=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_ARM_DCC=y
CONFIG_PL01X_SERIAL=y
# CONFIG_GZIP is not set
+69
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@@ -0,0 +1,69 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="amd_versal2_mini"
CONFIG_COUNTER_FREQUENCY=100000000
CONFIG_ARCH_VERSAL2=y
CONFIG_TEXT_BASE=0x10000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="amd-versal2-mini"
CONFIG_DEBUG_UART_BASE=0xf1920000
CONFIG_DEBUG_UART_CLOCK=100000000
# CONFIG_PSCI_RESET is not set
CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_DEBUG_UART=y
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_AUTOBOOT is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="versal2> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_BOOTI is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_FDT is not set
# CONFIG_CMD_GO is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_EMBED=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_DEBUG_UART_PL011=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_ARM_DCC=y
CONFIG_PL01X_SERIAL=y
CONFIG_FAT_WRITE=y
# CONFIG_GZIP is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LMB is not set
+84
View File
@@ -0,0 +1,84 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="amd_versal2_mini"
# CONFIG_ARM64_CRC32 is not set
CONFIG_COUNTER_FREQUENCY=100000000
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_VERSAL2=y
CONFIG_TEXT_BASE=0xBBF00000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=3
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xBBF20000
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="amd-versal2-mini"
CONFIG_DEBUG_UART_BASE=0xf1920000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
# CONFIG_PSCI_RESET is not set
CONFIG_SYS_LOAD_ADDR=0xBBF80000
CONFIG_DEBUG_UART=y
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="versal2> "
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTI is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_FDT is not set
# CONFIG_CMD_GO is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
CONFIG_OF_EMBED=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_GPIO is not set
# CONFIG_I2C is not set
# CONFIG_INPUT is not set
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
# CONFIG_SPI_FLASH_LOCK is not set
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_MT35XU=y
# CONFIG_POWER is not set
CONFIG_DEBUG_UART_PL011=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_ARM_DCC=y
CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_HAS_CQSPI_REF_CLK=y
CONFIG_CQSPI_REF_CLK=200000000
CONFIG_CADENCE_OSPI_VERSAL=y
# CONFIG_GZIP is not set
+79
View File
@@ -0,0 +1,79 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="amd_versal2_mini"
# CONFIG_ARM64_CRC32 is not set
CONFIG_COUNTER_FREQUENCY=100000000
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_VERSAL2=y
CONFIG_TEXT_BASE=0xBBF00000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=3
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xBBF20000
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="amd-versal2-mini"
CONFIG_DEBUG_UART_BASE=0xf1920000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
# CONFIG_PSCI_RESET is not set
CONFIG_SYS_LOAD_ADDR=0xBBF80000
CONFIG_DEBUG_UART=y
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="versal2> "
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTI is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_FDT is not set
# CONFIG_CMD_GO is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
CONFIG_OF_EMBED=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_GPIO is not set
# CONFIG_I2C is not set
# CONFIG_INPUT is not set
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
# CONFIG_SPI_FLASH_LOCK is not set
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
# CONFIG_POWER is not set
CONFIG_DEBUG_UART_PL011=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_ARM_DCC=y
CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ZYNQMP_GQSPI=y
# CONFIG_GZIP is not set
+2 -1
View File
@@ -46,6 +46,7 @@ CONFIG_CMD_USB=y
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_NFS=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
@@ -59,6 +60,7 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SQUASHFS=y
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_UBI=y
CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_BOARD=y
CONFIG_DTB_RESELECT=y
@@ -119,7 +121,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_ARM_DCC=y
CONFIG_PL01X_SERIAL=y
CONFIG_XILINX_UARTLITE=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_AMD_VERSAL2=y
CONFIG_SPI=y
+1
View File
@@ -58,6 +58,7 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SQUASHFS=y
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_UBI=y
CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_BOARD=y
CONFIG_DTB_RESELECT=y
+1
View File
@@ -59,6 +59,7 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SQUASHFS=y
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_UBI=y
CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_BOARD=y
CONFIG_ENV_IS_NOWHERE=y
+1
View File
@@ -81,6 +81,7 @@ CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_MTDPARTS_SPREAD=y
CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
CONFIG_CMD_UBI=y
CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_OF_BOARD=y
CONFIG_OF_LIST="zynq-zc702 zynq-zc706 zynq-zc770-xm010 zynq-zc770-xm011 zynq-zc770-xm011-x16 zynq-zc770-xm012 zynq-zc770-xm013 zynq-cc108 zynq-microzed zynq-minized zynq-picozed zynq-zed zynq-zturn zynq-zturn-v5 zynq-zybo zynq-zybo-z7 zynq-dlc20-rev1.0"
CONFIG_ENV_IS_NOWHERE=y
+1
View File
@@ -81,6 +81,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_NFS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
+1
View File
@@ -101,6 +101,7 @@ CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_MTDPARTS_SPREAD=y
CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
CONFIG_CMD_UBI=y
CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_BOARD=y
+1
View File
@@ -726,6 +726,7 @@ static ulong zynqmp_clk_set_rate(struct clk *clk, ulong rate)
case gem_tsu:
case qspi_ref ... can1_ref:
case usb0_bus_ref ... usb3_dual_ref:
case dp_video_ref ... dp_stc_ref:
return zynqmp_clk_set_peripheral_rate(priv, id,
rate, two_divs);
default:
+2
View File
@@ -241,6 +241,8 @@ const struct flash_info spi_nor_ids[] = {
SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
{ INFO("is25lx512", 0x9d5a1a, 0, 64 * 1024, 1024,
SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES | SPI_NOR_HAS_TB) },
{ INFO("is25lp01gg", 0x9d6021, 0, 64 * 1024, 2048,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_TB) },
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
/* Macronix */
+8
View File
@@ -44,6 +44,7 @@ enum {
ZYNQMP_VARIANT_DR_SE = BIT(4),
ZYNQMP_VARIANT_EG_SE = BIT(5),
ZYNQMP_VARIANT_TEG = BIT(6),
ZYNQMP_VARIANT_EG_LR = BIT(7),
};
struct zynqmp_device {
@@ -64,6 +65,11 @@ static const struct zynqmp_device zynqmp_devices[] = {
.device = 1,
.variants = ZYNQMP_VARIANT_EG,
},
{
.id = 0x04689093,
.device = 1,
.variants = ZYNQMP_VARIANT_EG_LR,
},
{
.id = 0x04711093,
.device = 2,
@@ -300,6 +306,8 @@ static int soc_xilinx_zynqmp_detect_machine(struct udevice *dev, u32 idcode,
strlcat(priv->machine, "eg", sizeof(priv->machine));
} else if (device->variants & ZYNQMP_VARIANT_EG_SE) {
strlcat(priv->machine, "eg_SE", sizeof(priv->machine));
} else if (device->variants & ZYNQMP_VARIANT_EG_LR) {
strlcat(priv->machine, "eg_LR", sizeof(priv->machine));
} else if (device->variants & ZYNQMP_VARIANT_DR) {
strlcat(priv->machine, "dr", sizeof(priv->machine));
} else if (device->variants & ZYNQMP_VARIANT_DR_SE) {
Vendored
+11 -1
View File
@@ -38,14 +38,24 @@ static ulong env_new_offset = CONFIG_ENV_OFFSET_REDUND;
DECLARE_GLOBAL_DATA_PTR;
__weak int spi_get_env_dev(void)
{
#ifdef CONFIG_ENV_SPI_BUS
return CONFIG_ENV_SPI_BUS;
#else
return 0;
#endif
}
static int setup_flash_device(struct spi_flash **env_flash)
{
#if CONFIG_IS_ENABLED(DM_SPI_FLASH)
struct udevice *new;
int ret;
int dev = spi_get_env_dev();
/* speed and mode will be read from DT */
ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
ret = spi_flash_probe_bus_cs(dev, CONFIG_ENV_SPI_CS,
&new);
if (ret) {
env_set_default("spi_flash_probe_bus_cs() failed", 0);
+20
View File
@@ -0,0 +1,20 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Configuration for AMD Versal Gen2 MINI configuration
*
* Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc.
*
* Michal Simek <michal.simek@amd.com>
*/
#ifndef __CONFIG_VERSAL2_MINI_H
#define __CONFIG_VERSAL2_MINI_H
#define CFG_EXTRA_ENV_SETTINGS
#include <configs/amd_versal2.h>
/* Undef unneeded configs */
#undef CFG_EXTRA_ENV_SETTINGS
#endif /* __CONFIG_VERSAL2_MINI_H */
+2
View File
@@ -743,4 +743,6 @@ int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops)
#define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops)
int spi_get_env_dev(void);
#endif /* _SPI_H_ */
+6
View File
@@ -20,9 +20,11 @@ extern struct xilinx_fpga_op zynq_op;
#define XILINX_ZYNQ_XC7Z007S 0x3
#define XILINX_ZYNQ_XC7Z010 0x2
#define XILINX_ZYNQ_XC7Z010_LR 0x4
#define XILINX_ZYNQ_XC7Z012S 0x1c
#define XILINX_ZYNQ_XC7Z014S 0x8
#define XILINX_ZYNQ_XC7Z015 0x1b
#define XILINX_ZYNQ_XC7Z020_LR 0x9
#define XILINX_ZYNQ_XC7Z020 0x7
#define XILINX_ZYNQ_XC7Z030 0xc
#define XILINX_ZYNQ_XC7Z035 0x12
@@ -32,9 +34,11 @@ extern struct xilinx_fpga_op zynq_op;
/* Device Image Sizes */
#define XILINX_XC7Z007S_SIZE 16669920/8
#define XILINX_XC7Z010_SIZE 16669920/8
#define XILINX_XC7Z010_LR_SIZE 16669920/8
#define XILINX_XC7Z012S_SIZE 28085344/8
#define XILINX_XC7Z014S_SIZE 32364512/8
#define XILINX_XC7Z015_SIZE 28085344/8
#define XILINX_XC7Z020_LR_SIZE 32364512/8
#define XILINX_XC7Z020_SIZE 32364512/8
#define XILINX_XC7Z030_SIZE 47839328/8
#define XILINX_XC7Z035_SIZE 106571232/8
@@ -44,9 +48,11 @@ extern struct xilinx_fpga_op zynq_op;
/* Device Names */
#define XILINX_XC7Z007S_NAME "7z007s"
#define XILINX_XC7Z010_NAME "7z010"
#define XILINX_XC7Z010_LR_NAME "xc7z010_lr"
#define XILINX_XC7Z012S_NAME "7z012s"
#define XILINX_XC7Z014S_NAME "7z014s"
#define XILINX_XC7Z015_NAME "7z015"
#define XILINX_XC7Z020_LR_NAME "xa7z020_lr"
#define XILINX_XC7Z020_NAME "7z020"
#define XILINX_XC7Z030_NAME "7z030"
#define XILINX_XC7Z035_NAME "7z035"