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arm: dts: k3-am625-verdin: fix boot

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A53 U-Boot proper got broken because nodes marked as 'bootph-pre-ram'
are no longer available in U-Boot proper before relocation.

Fix this by marking all nodes in u-boot.dtsi as 'bootph-all'.

Fixes: 9e644284ab ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This commit is contained in:
Marcel Ziswiler
2023-10-11 13:22:29 -04:00
committed by Tom Rini
parent 1786861415
commit 5be1fef7f3
1 changed files with 36 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
+36 -36
View File
@@ -17,49 +17,49 @@
};
memory@80000000 {
bootph-pre-ram;
bootph-all;
};
};
&cbass_main {
bootph-pre-ram;
bootph-all;
timer@2400000 {
clock-frequency = <25000000>;
bootph-pre-ram;
bootph-all;
};
};
&cbass_mcu {
bootph-pre-ram;
bootph-all;
};
&cbass_wakeup {
bootph-pre-ram;
bootph-all;
};
&chipid {
bootph-pre-ram;
bootph-all;
};
&cpsw3g {
bootph-pre-ram;
bootph-all;
};
&cpsw3g_phy0 {
bootph-pre-ram;
bootph-all;
};
&cpsw3g_phy1 {
bootph-pre-ram;
bootph-all;
};
&cpsw_port1 {
bootph-pre-ram;
bootph-all;
};
&cpsw_port2 {
bootph-pre-ram;
bootph-all;
};
/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
@@ -67,40 +67,40 @@
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
bootph-pre-ram;
bootph-all;
};
&dmsc {
bootph-pre-ram;
bootph-all;
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
bootph-pre-ram;
bootph-all;
};
};
&dmss {
bootph-pre-ram;
bootph-all;
};
&fss {
bootph-pre-ram;
bootph-all;
};
&k3_clks {
bootph-pre-ram;
bootph-all;
};
&k3_pds {
bootph-pre-ram;
bootph-all;
};
&k3_reset {
bootph-pre-ram;
bootph-all;
};
&main_gpio0 {
bootph-pre-ram;
bootph-all;
};
/* On-module I2C - PMIC_I2C */
@@ -130,53 +130,53 @@
};
&main_pmx0 {
bootph-pre-ram;
bootph-all;
};
/* Verdin UART_3, used as the Linux console */
&main_uart0 {
bootph-pre-ram;
bootph-all;
};
/* Verdin UART_1 */
&main_uart1 {
bootph-pre-ram;
bootph-all;
};
&mcu_pmx0 {
bootph-pre-ram;
bootph-all;
};
&pinctrl_ctrl_sleep_moci {
bootph-pre-ram;
bootph-all;
};
&pinctrl_i2c0 {
bootph-pre-ram;
bootph-all;
};
&pinctrl_i2c1 {
bootph-pre-ram;
bootph-all;
};
&pinctrl_sdhci0 {
bootph-pre-ram;
bootph-all;
};
&pinctrl_uart0 {
bootph-pre-ram;
bootph-all;
};
&pinctrl_uart1 {
bootph-pre-ram;
bootph-all;
};
&pinctrl_wkup_uart0 {
bootph-pre-ram;
bootph-all;
};
&sdhci0 {
bootph-pre-ram;
bootph-all;
};
&sdhci2 {
@@ -184,18 +184,18 @@
};
&secure_proxy_main {
bootph-pre-ram;
bootph-all;
};
&verdin_ctrl_sleep_moci {
bootph-pre-ram;
bootph-all;
};
&wkup_conf {
bootph-pre-ram;
bootph-all;
};
/* Verdin UART_2 */
&wkup_uart0 {
bootph-pre-ram;
bootph-all;
};