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Merge patch series "An effort to bring DT bindings compliance within U-Boot"

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Sumit Garg <sumit.garg@linaro.org> says:

Prerequisite
------------

This patch series requires devicetree-rebasing git repo to be added as a
subtree to the main U-Boot repo via:

$ git subtree add --prefix dts/upstream \
      https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git \
      v6.7-dts --squash

Background
----------

This effort started while I was reviewing patch series corresponding to
Qcom platforms [1] which was about to import modified devicetree source
files from Linux kernel. I suppose keeping devicetree files sync with
Linux kernel without any DT bindings schema validation has been a pain
for U-Boot SoC/platform maintainers. There has been past discussions
about a single DT repo but that hasn't come up and Linux kernel remained
the place where DT source files as well as bindings are placed and
maintained.

However, Linux kernel DT maintainers proposed [2] for U-Boot to rather
use devicetree-rebasing repo [3] which is a forked copy from Linux
kernel for DT source files as well as bindings. It is tagged at every
Linux kernel major release or intermideate release candidates. So here I
have tried to reuse that to bring DT bingings compliance as well as a
standard way to maintain a regular sync of DT source files with Linux
kernel.

In order to maintain devicetree files sync, U-Boot will maintains a Git
subtree for devicetee-rebasing repo as `dts/upstream` sub-directory.
U-Boot will regularly sync `dts/upstream/` subtree whenever the next window
opens with the next available kernel major release.
`dts/update-dts-subtree.sh` script provides a wrapper around git subtree
pull command, usage from the top level U-Boot source tree, run:

$ ./dts/update-dts-subtree.sh pull <devicetree-rebasing-release-tag>

If required it is also possible to cherry-pick fixes from
devicetree-rebasing tree prior to next sync, usage:

$ ./dts/update-dts-subtree.sh pick <devicetree-rebasing-commit-id>

The RFC/prototype for this series has been discussed with Linux DT
maintainers as well as U-Boot maintainers here [4]. Now we would like to
reach out to wider U-Boot community to seek feedback.

[1] https://lore.kernel.org/all/CAFA6WYMLUD9cnkr=R0Uur+1UeTMkKjM2zDdMJtXb3nmrLk+pDg@mail.gmail.com/
[2] https://lore.kernel.org/all/CAL_JsqKEjv2tSGmT+0ZiO7_qbBfhTycbGnhJhYpKDFzfO9jzDg@mail.gmail.com/
[3] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/
[4] https://github.com/u-boot/u-boot/pull/451

Changes
-------

Traditionally, U-Boot placed copies of devicetree source files from Linux
kernel into `arch/<arch>/dts/<name>.dts` which can be selected via setting
"<name>" when prompted for `DEFAULT_DEVICE_TREE` by Kconfig.

SoC/board maintainers are encouraged to migrate to use synced copies from
`dts/upstream/src/<arch>/<vendor>`. To do that enable `OF_UPSTREAM` for the
SoC being used via Kconfig and set up "<vendor>/<name>" when prompted for
`DEFAULT_DEVICE_TREE` by Kconfig.

An example have been shown for Amlogic meson-gxbb SoC and corresponding
derived boards via patch #10 and #11.

Devicetree bindings schema checks
---------------------------------

With devicetee-rebasing Git subtree, the devicetree bindings are also
regularly synced with Linux kernel as `dts/upstream/Bindings/`
sub-directory. This allows U-Boot to run devicetree bindings schema checks
which will bring compliance to U-Boot core/drivers regarding usage of
devicetree.

Dependencies
------------

The DT schema project must be installed in order to validate the DT schema
binding documents and validate DTS files using the DT schema. The DT schema
project can be installed with pip:

$ pip3 install dtschema

Note that 'dtschema' installation requires 'swig' and Python development
files installed first. On Debian/Ubuntu systems:

$ apt install swig python3-dev

Several executables (dt-doc-validate, dt-mk-schema, dt-validate) will be
installed. Ensure they are in your PATH (~/.local/bin by default).

Recommended is also to install yamllint (used by dtschema when present).

$ apt install yamllint

Running checks
--------------

In order to perform validation of DTB files, use the ``dtbs_check`` target:

$ make dtbs_check

It is also possible to run checks with a subset of matching schema files by
setting the ``DT_SCHEMA_FILES`` variable to 1 or more specific schema files
or patterns (partial match of a fixed string). Each file or pattern should
be separated by ':'.

$ make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml:rtc.yaml
$ make dtbs_check DT_SCHEMA_FILES=/gpio/
$ make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml
This commit is contained in:
Tom Rini
2024-02-29 22:24:23 -05:00
parent dbe9334e51 932600f329
commit 5b82503295
30 changed files with 283 additions and 2779 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.azure-pipelines.yml
+2 -1
View File
@@ -65,7 +65,8 @@ stages:
# have no matches.
- script: git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_'
:^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h
:^include/linux/kconfig.h :^tools/ && exit 1 || exit 0
:^include/linux/kconfig.h :^tools/ :^dts/upstream/ &&
exit 1 || exit 0
- job: docs
displayName: 'Build documentation'
.gitlab-ci.yml
+2 -1
View File
@@ -161,7 +161,8 @@ check for new CONFIG symbols outside Kconfig:
# have no matches.
- git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_'
:^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h
:^include/linux/kconfig.h :^tools/ && exit 1 || exit 0
:^include/linux/kconfig.h :^tools/ :^dts/upstream/ &&
exit 1 || exit 0
# build documentation
docs:
MAINTAINERS
+5
View File
@@ -989,6 +989,11 @@ F: cmd/cyclic.c
F: common/cyclic.c
F: include/cyclic.h
DEVICETREE REBASING SUBTREE
M: Sumit Garg <sumit.garg@linaro.org>
S: Maintained
F: dts/upstream/
DFU
M: Lukasz Majewski <lukma@denx.de>
M: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Makefile
+20 -3
View File
@@ -835,7 +835,8 @@ UBOOTINCLUDE := \
-I$(srctree)/arch/arm/thumb1/include), \
-I$(srctree)/arch/arm/thumb1/include)) \
-I$(srctree)/arch/$(ARCH)/include \
-include $(srctree)/include/linux/kconfig.h
-include $(srctree)/include/linux/kconfig.h \
-I$(srctree)/dts/upstream/include
NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include)
@@ -1158,12 +1159,28 @@ endif
@# disabling OF_BOARD.
$(call cmd,ofcheck,$(KCONFIG_CONFIG))
PHONY += dtbs
PHONY += dtbs dtbs_check
dtbs: dts/dt.dtb
@:
dts/dt.dtb: u-boot
dts/dt.dtb: dtbs_prepare u-boot
$(Q)$(MAKE) $(build)=dts dtbs
dtbs_prepare: prepare3
ifneq ($(filter dtbs_check, $(MAKECMDGOALS)),)
export CHECK_DTBS=y
endif
ifneq ($(CHECK_DTBS),)
dtbs_prepare: dt_binding_check
endif
dtbs_check: dt_binding_check dtbs
DT_BINDING_DIR := dts/upstream/Bindings
dt_binding_check: scripts_dtc
$(Q)$(MAKE) $(build)=$(DT_BINDING_DIR) $(DT_BINDING_DIR)/processed-schema.json
quiet_cmd_copy = COPY $@
cmd_copy = cp $< $@
arch/arm/dts/Makefile
-8
View File
@@ -216,14 +216,6 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-a1-ad401.dtb \
meson-axg-s400.dtb \
meson-axg-jethome-jethub-j100.dtb \
meson-gxbb-kii-pro.dtb \
meson-gxbb-nanopi-k2.dtb \
meson-gxbb-odroidc2.dtb \
meson-gxbb-nanopi-k2.dtb \
meson-gxbb-p200.dtb \
meson-gxbb-p201.dtb \
meson-gxbb-wetek-hub.dtb \
meson-gxbb-wetek-play2.dtb \
meson-gxl-s805x-libretech-ac.dtb \
meson-gxl-s905d-libretech-pc.dtb \
meson-gxl-s905w-jethome-jethub-j80.dtb \
arch/arm/dts/meson-gxbb-kii-pro.dts
-140
View File
@@ -1,140 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Mohammad Rasim <mohammad.rasim96@gmail.com>
*/
/dts-v1/;
#include "meson-gxbb-p20x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/sound/meson-aiu.h>
/ {
compatible = "videostrong,kii-pro", "amlogic,meson-gxbb";
model = "Videostrong KII Pro";
spdif_dit: audio-codec-0 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
status = "okay";
sound-name-prefix = "DIT";
};
leds {
compatible = "gpio-leds";
led {
gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
default-state = "off";
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <20>;
button-reset {
label = "reset";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
};
};
sound {
compatible = "amlogic,gx-sound-card";
model = "KII-PRO";
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
dai-link-0 {
sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
};
dai-link-1 {
sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
};
dai-link-2 {
sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
dai-format = "i2s";
mclk-fs = <256>;
codec-0 {
sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
};
};
dai-link-3 {
sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
codec-0 {
sound-dai = <&spdif_dit>;
};
};
dai-link-4 {
sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
codec-0 {
sound-dai = <&hdmi_tx>;
};
};
};
};
&aiu {
status = "okay";
pinctrl-0 = <&spdif_out_y_pins>;
pinctrl-names = "default";
};
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rmii_pins>;
pinctrl-names = "default";
phy-handle = <&eth_phy0>;
phy-mode = "rmii";
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@0 {
/* IC Plus IP101GR (0x02430c54) */
reg = <0>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
};
};
};
&ir {
linux,rc-map-name = "rc-videostrong-kii-pro";
};
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm4335a0";
shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
host-wakeup-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;
clock-names = "lpo";
};
};
arch/arm/dts/meson-gxbb-nanopi-k2.dts
-426
View File
@@ -1,426 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2017 Andreas Färber
*/
/dts-v1/;
#include "meson-gxbb.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/sound/meson-aiu.h>
/ {
compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
model = "FriendlyARM NanoPi K2";
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
leds {
compatible = "gpio-leds";
led-stat {
label = "nanopi-k2:blue:stat";
gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
default-state = "on";
panic-indicator;
};
};
vdd_5v: regulator-vdd-5v {
compatible = "regulator-fixed";
regulator-name = "VDD_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vddio_ao18: regulator-vddio-ao18 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddio_ao3v3: regulator-vddio-ao3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vddio_tf: regulator-vddio-tf {
compatible = "regulator-gpio";
regulator-name = "VDDIO_TF";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <3300000 0>,
<1800000 1>;
regulator-settling-time-up-us = <100>;
regulator-settling-time-down-us = <5000>;
};
wifi_32k: wifi-32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
clocks = <&wifi_32k>;
clock-names = "ext_clock";
};
vcc1v8: regulator-vcc1v8 {
compatible = "regulator-fixed";
regulator-name = "VCC1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcc3v3: regulator-vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
/* CVBS is available on CON1 pin 36, disabled by default */
cvbs-connector {
compatible = "composite-video-connector";
status = "disabled";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
sound {
compatible = "amlogic,gx-sound-card";
model = "NANOPI-K2";
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
};
dai-link-1 {
sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
dai-format = "i2s";
mclk-fs = <256>;
codec-0 {
sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
};
};
dai-link-2 {
sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
codec-0 {
sound-dai = <&hdmi_tx>;
};
};
};
};
&aiu {
status = "okay";
};
&cec_AO {
status = "okay";
pinctrl-0 = <&ao_cec_pins>;
pinctrl-names = "default";
hdmi-phandle = <&hdmi_tx>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default";
phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
amlogic,tx-delay-ns = <2>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
};
};
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&gpio_ao {
gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
"VCCK En", "CON1 Header Pin31",
"I2S Header Pin6", "IR In", "I2S Header Pin7",
"I2S Header Pin3", "I2S Header Pin4",
"I2S Header Pin5", "HDMI CEC", "SYS LED",
/* GPIO_TEST_N */
"";
};
&gpio {
gpio-line-names = /* Bank GPIOZ */
"Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
"Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
"Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
"Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
"Eth PHY nRESET", "Eth PHY Intc",
/* Bank GPIOH */
"HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL",
"CON1 Header Pin33",
/* Bank BOOT */
"eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
"eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
"eMMC Reset", "eMMC CMD",
"", "", "", "", "eMMC DS",
"", "",
/* Bank CARD */
"SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
"SDCard D3", "SDCard D2", "SDCard Det",
/* Bank GPIODV */
"", "", "", "", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "", "",
"I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
"VDDEE Regulator", "VCCK Regulator",
/* Bank GPIOY */
"CON1 Header Pin7", "CON1 Header Pin11",
"CON1 Header Pin13", "CON1 Header Pin15",
"CON1 Header Pin18", "CON1 Header Pin19",
"CON1 Header Pin22", "CON1 Header Pin21",
"CON1 Header Pin24", "CON1 Header Pin23",
"CON1 Header Pin26", "CON1 Header Pin29",
"CON1 Header Pin32", "CON1 Header Pin8",
"CON1 Header Pin10", "CON1 Header Pin16",
"CON1 Header Pin12",
/* Bank GPIOX */
"WIFI SDIO D0", "WIFI SDIO D1", "WIFI SDIO D2",
"WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
"WIFI Power Enable", "WIFI WAKE HOST",
"Bluetooth PCM DOUT", "Bluetooth PCM DIN",
"Bluetooth PCM SYNC", "Bluetooth PCM CLK",
"Bluetooth UART TX", "Bluetooth UART RX",
"Bluetooth UART CTS", "Bluetooth UART RTS",
"", "", "", "WIFI 32K", "Bluetooth Enable",
"Bluetooth WAKE HOST", "",
/* Bank GPIOCLK */
"", "CON1 Header Pin35", "", "";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&saradc {
status = "okay";
vref-supply = <&vddio_ao18>;
};
/* SDIO */
&sd_emmc_a {
status = "okay";
pinctrl-0 = <&sdio_pins>, <&sdio_irq_pins>;
pinctrl-1 = <&sdio_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddio_ao3v3>;
vqmmc-supply = <&vddio_ao18>;
brcmf: wifi@1 {
compatible = "brcm,bcm4329-fmac";
reg = <1>;
};
};
/* SD */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_pins>;
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-ddr50;
max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddio_ao3v3>;
vqmmc-supply = <&vddio_tf>;
};
/* eMMC */
&sd_emmc_c {
status = "disabled";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
max-frequency = <200000000>;
non-removable;
disable-wp;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc3v3>;
vqmmc-supply = <&vcc1v8>;
};
/* DBG_UART */
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
/* Bluetooth on AP6212 */
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
clocks = <&wifi_32k>;
clock-names = "lpo";
vbat-supply = <&vddio_ao3v3>;
vddio-supply = <&vddio_ao18>;
host-wakeup-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
};
};
/* 40-pin CON1 */
&uart_C {
status = "disabled";
pinctrl-0 = <&uart_c_pins>;
pinctrl-names = "default";
};
&usb0_phy {
status = "okay";
phy-supply = <&vdd_5v>;
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
arch/arm/dts/meson-gxbb-odroidc2.dts
-414
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
* Copyright (c) 2016 BayLibre, Inc.
* Author: Kevin Hilman <khilman@kernel.org>
*/
/dts-v1/;
#include "meson-gxbb.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/sound/meson-aiu.h>
/ {
compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
model = "Hardkernel ODROID-C2";
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
usb_otg_pwr: regulator-usb-pwrs {
compatible = "regulator-fixed";
regulator-name = "USB_OTG_PWR";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
/*
* signal name from schematics: PWREN
*/
gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
enable-active-high;
/*
* signal name from schematics: USB_POWER
*/
vin-supply = <&p5v0>;
};
leds {
compatible = "gpio-leds";
led-blue {
label = "c2:blue:alive";
gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
};
p5v0: regulator-p5v0 {
compatible = "regulator-fixed";
regulator-name = "P5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
hdmi_p5v0: regulator-hdmi_p5v0 {
compatible = "regulator-fixed";
regulator-name = "HDMI_P5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
/* AP2331SA-7 */
vin-supply = <&p5v0>;
};
tflash_vdd: regulator-tflash_vdd {
compatible = "regulator-fixed";
regulator-name = "TFLASH_VDD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
/*
* signal name from schematics: TFLASH_VDD_EN
*/
gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
enable-active-high;
/* U16 RT9179GB */
vin-supply = <&vddio_ao3v3>;
};
tf_io: gpio-regulator-tf_io {
compatible = "regulator-gpio";
regulator-name = "TF_IO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
/*
* signal name from schematics: TF_3V3N_1V8_EN
*/
gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <3300000 0>,
<1800000 1>;
/* U12/U13 RT9179GB */
vin-supply = <&vddio_ao3v3>;
};
vcc1v8: regulator-vcc1v8 {
compatible = "regulator-fixed";
regulator-name = "VCC1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
/* U18 RT9179GB */
vin-supply = <&vddio_ao3v3>;
};
vcc3v3: regulator-vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vddio_ao1v8: regulator-vddio-ao1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
/* U17 RT9179GB */
vin-supply = <&p5v0>;
};
vddio_ao3v3: regulator-vddio-ao3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
/* U11 MP2161GJ-C499 */
vin-supply = <&p5v0>;
};
ddr3_1v5: regulator-ddr3_1v5 {
compatible = "regulator-fixed";
regulator-name = "DDR3_1V5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
/* U15 MP2161GJ-C499 */
vin-supply = <&p5v0>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
sound {
compatible = "amlogic,gx-sound-card";
model = "ODROID-C2";
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
};
dai-link-1 {
sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
dai-format = "i2s";
mclk-fs = <256>;
codec-0 {
sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
};
};
dai-link-2 {
sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
codec-0 {
sound-dai = <&hdmi_tx>;
};
};
};
};
&aiu {
status = "okay";
};
&cec_AO {
status = "okay";
pinctrl-0 = <&ao_cec_pins>;
pinctrl-names = "default";
hdmi-phandle = <&hdmi_tx>;
};
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default";
phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
amlogic,tx-delay-ns = <2>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
};
};
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
hdmi-supply = <&hdmi_p5v0>;
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&i2c_A {
status = "okay";
pinctrl-0 = <&i2c_a_pins>;
pinctrl-names = "default";
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
linux,rc-map-name = "rc-odroid";
};
&gpio_ao {
gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
"USB HUB nRESET", "USB OTG Power En",
"J7 Header Pin2", "IR In", "J7 Header Pin4",
"J7 Header Pin6", "J7 Header Pin5", "J7 Header Pin7",
"HDMI CEC", "SYS LED",
/* GPIO_TEST_N */
"";
};
&gpio {
gpio-line-names = /* Bank GPIOZ */
"Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
"Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
"Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
"Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
"Eth PHY nRESET", "Eth PHY Intc",
/* Bank GPIOH */
"HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "",
/* Bank BOOT */
"eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
"eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
"eMMC Reset", "eMMC CMD",
"", "", "", "", "", "", "",
/* Bank CARD */
"SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
"SDCard D3", "SDCard D2", "SDCard Det",
/* Bank GPIODV */
"", "", "", "", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "", "",
"I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
"PWM D", "PWM B",
/* Bank GPIOY */
"Revision Bit0", "Revision Bit1", "",
"J2 Header Pin35", "", "", "", "J2 Header Pin36",
"J2 Header Pin31", "", "", "", "TF VDD En",
"J2 Header Pin32", "J2 Header Pin26", "", "",
/* Bank GPIOX */
"J2 Header Pin29", "J2 Header Pin24",
"J2 Header Pin23", "J2 Header Pin22",
"J2 Header Pin21", "J2 Header Pin18",
"J2 Header Pin33", "J2 Header Pin19",
"J2 Header Pin16", "J2 Header Pin15",
"J2 Header Pin12", "J2 Header Pin13",
"J2 Header Pin8", "J2 Header Pin10",
"", "", "", "", "",
"J2 Header Pin11", "", "J2 Header Pin7", "",
/* Bank GPIOCLK */
"", "", "", "";
};
&saradc {
status = "okay";
vref-supply = <&vcc1v8>;
};
&scpi_clocks {
status = "disabled";
};
/* SD */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_pins>;
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-ddr50;
max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&tflash_vdd>;
vqmmc-supply = <&tf_io>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
max-frequency = <200000000>;
non-removable;
disable-wp;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc3v3>;
vqmmc-supply = <&vcc1v8>;
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb0_phy {
status = "disabled";
phy-supply = <&usb_otg_pwr>;
};
&usb1_phy {
status = "okay";
phy-supply = <&usb_otg_pwr>;
};
&usb0 {
status = "disabled";
};
&usb1 {
dr_mode = "host";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
hub@1 {
/* Genesys Logic GL852G USB 2.0 hub */
compatible = "usb5e3,610";
reg = <1>;
vdd-supply = <&p5v0>;
reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
};
};
arch/arm/dts/meson-gxbb-p200.dts
-100
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@@ -1,100 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
* Copyright (c) 2016 BayLibre, Inc.
* Author: Kevin Hilman <khilman@kernel.org>
*/
/dts-v1/;
#include "meson-gxbb-p20x.dtsi"
#include <dt-bindings/input/input.h>
/ {
compatible = "amlogic,p200", "amlogic,meson-gxbb";
model = "Amlogic Meson GXBB P200 Development Board";
avdd18_usb_adc: regulator-avdd18_usb_adc {
compatible = "regulator-fixed";
regulator-name = "AVDD18_USB_ADC";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
adc_keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
button-home {
label = "Home";
linux,code = <KEY_HOME>;
press-threshold-microvolt = <900000>; /* 50% */
};
button-esc {
label = "Esc";
linux,code = <KEY_ESC>;
press-threshold-microvolt = <684000>; /* 38% */
};
button-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
press-threshold-microvolt = <468000>; /* 26% */
};
button-down {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
press-threshold-microvolt = <252000>; /* 14% */
};
button-menu {
label = "Menu";
linux,code = <KEY_MENU>;
press-threshold-microvolt = <0>; /* 0% */
};
};
};
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default";
phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
amlogic,tx-delay-ns = <2>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@3 {
/* Micrel KSZ9031 (0x00221620) */
reg = <3>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
};
};
};
&i2c_B {
status = "okay";
pinctrl-0 = <&i2c_b_pins>;
pinctrl-names = "default";
};
&saradc {
status = "okay";
vref-supply = <&avdd18_usb_adc>;
};
arch/arm/dts/meson-gxbb-p201.dts
-26
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@@ -1,26 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
* Copyright (c) 2016 BayLibre, Inc.
* Author: Kevin Hilman <khilman@kernel.org>
*/
/dts-v1/;
#include "meson-gxbb-p20x.dtsi"
/ {
compatible = "amlogic,p201", "amlogic,meson-gxbb";
model = "Amlogic Meson GXBB P201 Development Board";
};
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rmii_pins>;
pinctrl-names = "default";
phy-mode = "rmii";
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0>, <10000>, <1000000>;
snps,reset-active-low;
};
arch/arm/dts/meson-gxbb-p20x.dtsi
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@@ -1,250 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
* Copyright (c) 2016 BayLibre, Inc.
* Author: Kevin Hilman <khilman@kernel.org>
*/
#include "meson-gxbb.dtsi"
/ {
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
usb_pwr: regulator-usb-pwrs {
compatible = "regulator-fixed";
regulator-name = "USB_PWR";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
/* signal name in schematic: USB_PWR_EN */
gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vddio_card: gpio-regulator {
compatible = "regulator-gpio";
regulator-name = "VDDIO_CARD";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
/* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */
states = <1800000 0>,
<3300000 1>;
regulator-settling-time-up-us = <10000>;
regulator-settling-time-down-us = <150000>;
};
vddio_boot: regulator-vddio_boot {
compatible = "regulator-fixed";
regulator-name = "VDDIO_BOOT";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddao_3v3: regulator-vddao_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vcc_3v3: regulator-vcc_3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
wifi32k: wifi32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
cvbs_connector: cvbs-connector {
compatible = "composite-video-connector";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
};
&cec_AO {
status = "okay";
pinctrl-0 = <&ao_cec_pins>;
pinctrl-names = "default";
hdmi-phandle = <&hdmi_tx>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
/* Wireless SDIO Module */
&sd_emmc_a {
status = "okay";
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
/* SD card */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_pins>;
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_card>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vddio_boot>;
};
/* This UART is brought out to the DB9 connector */
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb0_phy {
status = "okay";
phy-supply = <&usb_pwr>;
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
arch/arm/dts/meson-gxbb-wetek-hub.dts
-58
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@@ -1,58 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 BayLibre, Inc.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
/dts-v1/;
#include "meson-gxbb-wetek.dtsi"
#include <dt-bindings/sound/meson-aiu.h>
/ {
compatible = "wetek,hub", "amlogic,meson-gxbb";
model = "WeTek Hub";
sound {
compatible = "amlogic,gx-sound-card";
model = "WETEK-HUB";
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
};
dai-link-1 {
sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
dai-format = "i2s";
mclk-fs = <256>;
codec-0 {
sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
};
};
dai-link-2 {
sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
codec-0 {
sound-dai = <&hdmi_tx>;
};
};
};
};
&aiu {
status = "okay";
};
&ir {
linux,rc-map-name = "rc-wetek-hub";
};
arch/arm/dts/meson-gxbb-wetek-play2.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 BayLibre, Inc.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
/dts-v1/;
#include "meson-gxbb-wetek.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/sound/meson-aiu.h>
/ {
compatible = "wetek,play2", "amlogic,meson-gxbb";
model = "WeTek Play 2";
spdif_dit: audio-codec-0 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
status = "okay";
sound-name-prefix = "DIT";
};
leds {
led-wifi {
label = "wetek-play:wifi-status";
gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led-ethernet {
label = "wetek-play:ethernet-status";
gpios = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <100>;
button {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
};
};
sound {
compatible = "amlogic,gx-sound-card";
model = "WETEK-PLAY2";
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
};
dai-link-1 {
sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
};
dai-link-2 {
sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
dai-format = "i2s";
mclk-fs = <256>;
codec-0 {
sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
};
};
dai-link-3 {
sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
codec-0 {
sound-dai = <&spdif_dit>;
};
};
dai-link-4 {
sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
codec-0 {
sound-dai = <&hdmi_tx>;
};
};
};
};
&aiu {
status = "okay";
pinctrl-0 = <&spdif_out_y_pins>;
pinctrl-names = "default";
};
&i2c_A {
status = "okay";
pinctrl-0 = <&i2c_a_pins>;
pinctrl-names = "default";
};
&usb1_phy {
status = "okay";
};
&usb1 {
status = "okay";
};
&ir {
linux,rc-map-name = "rc-wetek-play2";
};
arch/arm/dts/meson-gxbb-wetek.dtsi
-292
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@@ -1,292 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
* Copyright (c) 2016 BayLibre, Inc.
* Author: Kevin Hilman <khilman@kernel.org>
*/
#include "meson-gxbb.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/ {
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
leds {
compatible = "gpio-leds";
led-power {
/* red in suspend or power-off */
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
default-state = "on";
panic-indicator;
};
};
usb_pwr: regulator-usb-pwrs {
compatible = "regulator-fixed";
regulator-name = "USB_PWR";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vddio_boot: regulator-vddio_boot {
compatible = "regulator-fixed";
regulator-name = "VDDIO_BOOT";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddao_3v3: regulator-vddao_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vddio_ao18: regulator-vddio_ao18 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vcc_3v3: regulator-vcc_3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
wifi32k: wifi32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
cvbs-connector {
compatible = "composite-video-connector";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
};
&cec_AO {
status = "okay";
pinctrl-0 = <&ao_cec_pins>;
pinctrl-names = "default";
hdmi-phandle = <&hdmi_tx>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default";
phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
amlogic,tx-delay-ns = <2>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
};
};
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
hdmi-supply = <&vddio_ao18>;
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&saradc {
status = "okay";
vref-supply = <&vddio_ao18>;
};
/* Wireless SDIO Module */
&sd_emmc_a {
status = "okay";
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
/* SD card */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_pins>;
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vcc_3v3>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vddio_boot>;
};
/* This is connected to the Bluetooth module: */
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
};
};
/* This UART is brought out to the DB9 connector */
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb0_phy {
status = "okay";
phy-supply = <&usb_pwr>;
};
&usb0 {
status = "okay";
};
arch/arm/dts/meson-gxbb.dtsi
-870
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@@ -1,870 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
*/
#include "meson-gx.dtsi"
#include "meson-gx-mali450.dtsi"
#include <dt-bindings/gpio/meson-gxbb-gpio.h>
#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
#include <dt-bindings/clock/gxbb-clkc.h>
#include <dt-bindings/clock/gxbb-aoclkc.h>
#include <dt-bindings/reset/gxbb-aoclkc.h>
/ {
compatible = "amlogic,meson-gxbb";
soc {
usb0_phy: phy@c0000000 {
compatible = "amlogic,meson-gxbb-usb2-phy";
#phy-cells = <0>;
reg = <0x0 0xc0000000 0x0 0x20>;
resets = <&reset RESET_USB_OTG>;
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
clock-names = "usb_general", "usb";
status = "disabled";
};
usb1_phy: phy@c0000020 {
compatible = "amlogic,meson-gxbb-usb2-phy";
#phy-cells = <0>;
reg = <0x0 0xc0000020 0x0 0x20>;
resets = <&reset RESET_USB_OTG>;
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
clock-names = "usb_general", "usb";
status = "disabled";
};
usb0: usb@c9000000 {
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
reg = <0x0 0xc9000000 0x0 0x40000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
clock-names = "otg";
phys = <&usb0_phy>;
phy-names = "usb2-phy";
dr_mode = "host";
status = "disabled";
};
usb1: usb@c9100000 {
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
reg = <0x0 0xc9100000 0x0 0x40000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
clock-names = "otg";
phys = <&usb1_phy>;
phy-names = "usb2-phy";
dr_mode = "host";
status = "disabled";
};
};
};
&aiu {
compatible = "amlogic,aiu-gxbb", "amlogic,aiu";
clocks = <&clkc CLKID_AIU_GLUE>,
<&clkc CLKID_I2S_OUT>,
<&clkc CLKID_AOCLK_GATE>,
<&clkc CLKID_CTS_AMCLK>,
<&clkc CLKID_MIXER_IFACE>,
<&clkc CLKID_IEC958>,
<&clkc CLKID_IEC958_GATE>,
<&clkc CLKID_CTS_MCLK_I958>,
<&clkc CLKID_CTS_I958>;
clock-names = "pclk",
"i2s_pclk",
"i2s_aoclk",
"i2s_mclk",
"i2s_mixer",
"spdif_pclk",
"spdif_aoclk",
"spdif_mclk",
"spdif_mclk_sel";
resets = <&reset RESET_AIU>;
};
&aobus {
pinctrl_aobus: pinctrl@14 {
compatible = "amlogic,meson-gxbb-aobus-pinctrl";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpio_ao: bank@14 {
reg = <0x0 0x00014 0x0 0x8>,
<0x0 0x0002c 0x0 0x4>,
<0x0 0x00024 0x0 0x8>;
reg-names = "mux", "pull", "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_aobus 0 0 14>;
};
uart_ao_a_pins: uart_ao_a {
mux {
groups = "uart_tx_ao_a", "uart_rx_ao_a";
function = "uart_ao";
bias-disable;
};
};
uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
mux {
groups = "uart_cts_ao_a",
"uart_rts_ao_a";
function = "uart_ao";
bias-disable;
};
};
uart_ao_b_pins: uart_ao_b {
mux {
groups = "uart_tx_ao_b", "uart_rx_ao_b";
function = "uart_ao_b";
bias-disable;
};
};
uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
mux {
groups = "uart_cts_ao_b",
"uart_rts_ao_b";
function = "uart_ao_b";
bias-disable;
};
};
remote_input_ao_pins: remote_input_ao {
mux {
groups = "remote_input_ao";
function = "remote_input_ao";
bias-disable;
};
};
i2c_ao_pins: i2c_ao {
mux {
groups = "i2c_sck_ao",
"i2c_sda_ao";
function = "i2c_ao";
bias-disable;
};
};
pwm_ao_a_3_pins: pwm_ao_a_3 {
mux {
groups = "pwm_ao_a_3";
function = "pwm_ao_a_3";
bias-disable;
};
};
pwm_ao_a_6_pins: pwm_ao_a_6 {
mux {
groups = "pwm_ao_a_6";
function = "pwm_ao_a_6";
bias-disable;
};
};
pwm_ao_a_12_pins: pwm_ao_a_12 {
mux {
groups = "pwm_ao_a_12";
function = "pwm_ao_a_12";
bias-disable;
};
};
pwm_ao_b_pins: pwm_ao_b {
mux {
groups = "pwm_ao_b";
function = "pwm_ao_b";
bias-disable;
};
};
i2s_am_clk_pins: i2s_am_clk {
mux {
groups = "i2s_am_clk";
function = "i2s_out_ao";
bias-disable;
};
};
i2s_out_ao_clk_pins: i2s_out_ao_clk {
mux {
groups = "i2s_out_ao_clk";
function = "i2s_out_ao";
bias-disable;
};
};
i2s_out_lr_clk_pins: i2s_out_lr_clk {
mux {
groups = "i2s_out_lr_clk";
function = "i2s_out_ao";
bias-disable;
};
};
i2s_out_ch01_ao_pins: i2s_out_ch01_ao {
mux {
groups = "i2s_out_ch01_ao";
function = "i2s_out_ao";
bias-disable;
};
};
i2s_out_ch23_ao_pins: i2s_out_ch23_ao {
mux {
groups = "i2s_out_ch23_ao";
function = "i2s_out_ao";
bias-disable;
};
};
i2s_out_ch45_ao_pins: i2s_out_ch45_ao {
mux {
groups = "i2s_out_ch45_ao";
function = "i2s_out_ao";
bias-disable;
};
};
spdif_out_ao_6_pins: spdif_out_ao_6 {
mux {
groups = "spdif_out_ao_6";
function = "spdif_out_ao";
};
};
spdif_out_ao_13_pins: spdif_out_ao_13 {
mux {
groups = "spdif_out_ao_13";
function = "spdif_out_ao";
bias-disable;
};
};
ao_cec_pins: ao_cec {
mux {
groups = "ao_cec";
function = "cec_ao";
bias-disable;
};
};
ee_cec_pins: ee_cec {
mux {
groups = "ee_cec";
function = "cec_ao";
bias-disable;
};
};
};
};
&cbus {
spifc: spi@8c80 {
compatible = "amlogic,meson-gxbb-spifc";
reg = <0x0 0x08c80 0x0 0x80>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_SPI>;
status = "disabled";
};
};
&cec_AO {
clocks = <&clkc_AO CLKID_AO_CEC_32K>;
clock-names = "core";
};
&clkc_AO {
compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
clocks = <&xtal>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "mpeg-clk";
};
&efuse {
clocks = <&clkc CLKID_EFUSE>;
};
&ethmac {
clocks = <&clkc CLKID_ETH>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_MPLL2>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
};
&gpio_intc {
compatible = "amlogic,meson-gxbb-gpio-intc",
"amlogic,meson-gpio-intc";
status = "okay";
};
&hdmi_tx {
compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
resets = <&reset RESET_HDMITX_CAPB3>,
<&reset RESET_HDMI_SYSTEM_RESET>,
<&reset RESET_HDMI_TX>;
reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
clocks = <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_CLK81>,
<&clkc CLKID_GCLK_VENCI_INT0>;
clock-names = "isfr", "iahb", "venci";
};
&sysctrl {
clkc: clock-controller {
compatible = "amlogic,gxbb-clkc";
#clock-cells = <1>;
clocks = <&xtal>;
clock-names = "xtal";
};
};
&hwrng {
clocks = <&clkc CLKID_RNG0>;
clock-names = "core";
};
&i2c_A {
clocks = <&clkc CLKID_I2C>;
};
&i2c_AO {
clocks = <&clkc CLKID_AO_I2C>;
};
&i2c_B {
clocks = <&clkc CLKID_I2C>;
};
&i2c_C {
clocks = <&clkc CLKID_I2C>;
};
&mali {
compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
clock-names = "bus", "core";
assigned-clocks = <&clkc CLKID_GP0_PLL>;
assigned-clock-rates = <744000000>;
};
&periphs {
pinctrl_periphs: pinctrl@4b0 {
compatible = "amlogic,meson-gxbb-periphs-pinctrl";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpio: bank@4b0 {
reg = <0x0 0x004b0 0x0 0x28>,
<0x0 0x004e8 0x0 0x14>,
<0x0 0x00520 0x0 0x14>,
<0x0 0x00430 0x0 0x40>;
reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_periphs 0 0 119>;
};
emmc_pins: emmc {
mux-0 {
groups = "emmc_nand_d07",
"emmc_cmd";
function = "emmc";
bias-pull-up;
};
mux-1 {
groups = "emmc_clk";
function = "emmc";
bias-disable;
};
};
emmc_ds_pins: emmc-ds {
mux {
groups = "emmc_ds";
function = "emmc";
bias-pull-down;
};
};
emmc_clk_gate_pins: emmc_clk_gate {
mux {
groups = "BOOT_8";
function = "gpio_periphs";
bias-pull-down;
};
};
nor_pins: nor {
mux {
groups = "nor_d",
"nor_q",
"nor_c",
"nor_cs";
function = "nor";
bias-disable;
};
};
spi_pins: spi-pins {
mux {
groups = "spi_miso",
"spi_mosi",
"spi_sclk";
function = "spi";
bias-disable;
};
};
spi_idle_high_pins: spi-idle-high-pins {
mux {
groups = "spi_sclk";
bias-pull-up;
};
};
spi_idle_low_pins: spi-idle-low-pins {
mux {
groups = "spi_sclk";
bias-pull-down;
};
};
spi_ss0_pins: spi-ss0 {
mux {
groups = "spi_ss0";
function = "spi";
bias-disable;
};
};
sdcard_pins: sdcard {
mux-0 {
groups = "sdcard_d0",
"sdcard_d1",
"sdcard_d2",
"sdcard_d3",
"sdcard_cmd";
function = "sdcard";
bias-pull-up;
};
mux-1 {
groups = "sdcard_clk";
function = "sdcard";
bias-disable;
};
};
sdcard_clk_gate_pins: sdcard_clk_gate {
mux {
groups = "CARD_2";
function = "gpio_periphs";
bias-pull-down;
};
};
sdio_pins: sdio {
mux-0 {
groups = "sdio_d0",
"sdio_d1",
"sdio_d2",
"sdio_d3",
"sdio_cmd";
function = "sdio";
bias-pull-up;
};
mux-1 {
groups = "sdio_clk";
function = "sdio";
bias-disable;
};
};
sdio_clk_gate_pins: sdio_clk_gate {
mux {
groups = "GPIOX_4";
function = "gpio_periphs";
bias-pull-down;
};
};
sdio_irq_pins: sdio_irq {
mux {
groups = "sdio_irq";
function = "sdio";
bias-disable;
};
};
uart_a_pins: uart_a {
mux {
groups = "uart_tx_a",
"uart_rx_a";
function = "uart_a";
bias-disable;
};
};
uart_a_cts_rts_pins: uart_a_cts_rts {
mux {
groups = "uart_cts_a",
"uart_rts_a";
function = "uart_a";
bias-disable;
};
};
uart_b_pins: uart_b {
mux {
groups = "uart_tx_b",
"uart_rx_b";
function = "uart_b";
bias-disable;
};
};
uart_b_cts_rts_pins: uart_b_cts_rts {
mux {
groups = "uart_cts_b",
"uart_rts_b";
function = "uart_b";
bias-disable;
};
};
uart_c_pins: uart_c {
mux {
groups = "uart_tx_c",
"uart_rx_c";
function = "uart_c";
bias-disable;
};
};
uart_c_cts_rts_pins: uart_c_cts_rts {
mux {
groups = "uart_cts_c",
"uart_rts_c";
function = "uart_c";
bias-disable;
};
};
i2c_a_pins: i2c_a {
mux {
groups = "i2c_sck_a",
"i2c_sda_a";
function = "i2c_a";
bias-disable;
};
};
i2c_b_pins: i2c_b {
mux {
groups = "i2c_sck_b",
"i2c_sda_b";
function = "i2c_b";
bias-disable;
};
};
i2c_c_pins: i2c_c {
mux {
groups = "i2c_sck_c",
"i2c_sda_c";
function = "i2c_c";
bias-disable;
};
};
eth_rgmii_pins: eth-rgmii {
mux {
groups = "eth_mdio",
"eth_mdc",
"eth_clk_rx_clk",
"eth_rx_dv",
"eth_rxd0",
"eth_rxd1",
"eth_rxd2",
"eth_rxd3",
"eth_rgmii_tx_clk",
"eth_tx_en",
"eth_txd0",
"eth_txd1",
"eth_txd2",
"eth_txd3";
function = "eth";
bias-disable;
};
};
eth_rmii_pins: eth-rmii {
mux {
groups = "eth_mdio",
"eth_mdc",
"eth_clk_rx_clk",
"eth_rx_dv",
"eth_rxd0",
"eth_rxd1",
"eth_tx_en",
"eth_txd0",
"eth_txd1";
function = "eth";
bias-disable;
};
};
pwm_a_x_pins: pwm_a_x {
mux {
groups = "pwm_a_x";
function = "pwm_a_x";
bias-disable;
};
};
pwm_a_y_pins: pwm_a_y {
mux {
groups = "pwm_a_y";
function = "pwm_a_y";
bias-disable;
};
};
pwm_b_pins: pwm_b {
mux {
groups = "pwm_b";
function = "pwm_b";
bias-disable;
};
};
pwm_d_pins: pwm_d {
mux {
groups = "pwm_d";
function = "pwm_d";
bias-disable;
};
};
pwm_e_pins: pwm_e {
mux {
groups = "pwm_e";
function = "pwm_e";
bias-disable;
};
};
pwm_f_x_pins: pwm_f_x {
mux {
groups = "pwm_f_x";
function = "pwm_f_x";
bias-disable;
};
};
pwm_f_y_pins: pwm_f_y {
mux {
groups = "pwm_f_y";
function = "pwm_f_y";
bias-disable;
};
};
hdmi_hpd_pins: hdmi_hpd {
mux {
groups = "hdmi_hpd";
function = "hdmi_hpd";
bias-disable;
};
};
hdmi_i2c_pins: hdmi_i2c {
mux {
groups = "hdmi_sda", "hdmi_scl";
function = "hdmi_i2c";
bias-disable;
};
};
i2sout_ch23_y_pins: i2sout_ch23_y {
mux {
groups = "i2sout_ch23_y";
function = "i2s_out";
bias-disable;
};
};
i2sout_ch45_y_pins: i2sout_ch45_y {
mux {
groups = "i2sout_ch45_y";
function = "i2s_out";
bias-disable;
};
};
i2sout_ch67_y_pins: i2sout_ch67_y {
mux {
groups = "i2sout_ch67_y";
function = "i2s_out";
bias-disable;
};
};
spdif_out_y_pins: spdif_out_y {
mux {
groups = "spdif_out_y";
function = "spdif_out";
bias-disable;
};
};
};
};
&pwrc {
resets = <&reset RESET_VIU>,
<&reset RESET_VENC>,
<&reset RESET_VCBUS>,
<&reset RESET_BT656>,
<&reset RESET_DVIN_RESET>,
<&reset RESET_RDMA>,
<&reset RESET_VENCI>,
<&reset RESET_VENCP>,
<&reset RESET_VDAC>,
<&reset RESET_VDI6>,
<&reset RESET_VENCL>,
<&reset RESET_VID_LOCK>;
reset-names = "viu", "venc", "vcbus", "bt656",
"dvin", "rdma", "venci", "vencp",
"vdac", "vdi6", "vencl", "vid_lock";
clocks = <&clkc CLKID_VPU>,
<&clkc CLKID_VAPB>;
clock-names = "vpu", "vapb";
/*
* VPU clocking is provided by two identical clock paths
* VPU_0 and VPU_1 muxed to a single clock by a glitch
* free mux to safely change frequency while running.
* Same for VAPB but with a final gate after the glitch free mux.
*/
assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
<&clkc CLKID_VPU_0>,
<&clkc CLKID_VPU>, /* Glitch free mux */
<&clkc CLKID_VAPB_0_SEL>,
<&clkc CLKID_VAPB_0>,
<&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
<0>, /* Do Nothing */
<&clkc CLKID_VPU_0>,
<&clkc CLKID_FCLK_DIV4>,
<0>, /* Do Nothing */
<&clkc CLKID_VAPB_0>;
assigned-clock-rates = <0>, /* Do Nothing */
<666666666>,
<0>, /* Do Nothing */
<0>, /* Do Nothing */
<250000000>,
<0>; /* Do Nothing */
};
&saradc {
compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
clocks = <&xtal>,
<&clkc CLKID_SAR_ADC>,
<&clkc CLKID_SAR_ADC_CLK>,
<&clkc CLKID_SAR_ADC_SEL>;
clock-names = "clkin", "core", "adc_clk", "adc_sel";
};
&sd_emmc_a {
clocks = <&clkc CLKID_SD_EMMC_A>,
<&clkc CLKID_SD_EMMC_A_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_A>;
};
&sd_emmc_b {
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_B>;
};
&sd_emmc_c {
clocks = <&clkc CLKID_SD_EMMC_C>,
<&clkc CLKID_SD_EMMC_C_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_C>;
};
&simplefb_hdmi {
clocks = <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_CLK81>,
<&clkc CLKID_GCLK_VENCI_INT0>;
};
&spicc {
clocks = <&clkc CLKID_SPICC>;
clock-names = "core";
resets = <&reset RESET_PERIPHS_SPICC>;
num-cs = <1>;
};
&spifc {
clocks = <&clkc CLKID_SPI>;
};
&uart_A {
clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&uart_AO {
clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&uart_AO_B {
clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&uart_B {
clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&uart_C {
clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&vpu {
compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
};
&vdec {
compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec";
clocks = <&clkc CLKID_DOS_PARSER>,
<&clkc CLKID_DOS>,
<&clkc CLKID_VDEC_1>,
<&clkc CLKID_VDEC_HEVC>;
clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
resets = <&reset RESET_PARSER>;
reset-names = "esparser";
};
arch/arm/mach-meson/Kconfig
+1
View File
@@ -25,6 +25,7 @@ choice
config MESON_GXBB
bool "GXBB"
select MESON_GX
imply OF_UPSTREAM
help
Select this if your SoC is an S905
configs/nanopi-k2_defconfig
+1 -1
View File
@@ -6,7 +6,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2"
CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-nanopi-k2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xc81004c0
configs/odroid-c2_defconfig
+1 -1
View File
@@ -6,7 +6,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2"
CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-odroidc2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xc81004c0
configs/p200_defconfig
+1 -1
View File
@@ -6,7 +6,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200"
CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-p200"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xc81004c0
configs/p201_defconfig
+1 -1
View File
@@ -7,7 +7,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201"
CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-p201"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xc81004c0
configs/videostrong-kii-pro_defconfig
+1 -1
View File
@@ -6,7 +6,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-kii-pro"
CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-kii-pro"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xc81004c0
configs/wetek-hub_defconfig
+1 -1
View File
@@ -6,7 +6,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub"
CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-wetek-hub"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xc81004c0
configs/wetek-play2_defconfig
+1 -1
View File
@@ -6,7 +6,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2"
CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-wetek-play2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xc81004c0
doc/develop/devicetree/control.rst
+115 -44
View File
@@ -1,5 +1,6 @@
.. SPDX-License-Identifier: GPL-2.0+
.. sectionauthor:: Copyright 2011 The Chromium OS Authors
.. Copyright 2023-2024 Linaro Ltd.
Devicetree Control in U-Boot
============================
@@ -22,14 +23,13 @@ for three reasons:
hierarchical format
- It is fairly efficient to read incrementally
The arch/<arch>/dts directories contains a Makefile for building the devicetree
blob and embedding it in the U-Boot image. This is useful since it allows
U-Boot to configure itself according to what it finds there. If you have
a number of similar boards with different peripherals, you can describe
the features of each board in the devicetree file, and have a single
generic source base.
The U-Boot Makefile infrastructure allows for building the devicetree blob
and embedding it in the U-Boot image. This is useful since it allows U-Boot
to configure itself according to what it finds there. If you have a number
of similar boards with different peripherals, you can describe the features
of each board in the devicetree file, and have a single generic source base.
To enable this feature, add CONFIG_OF_CONTROL to your board config file.
To enable this feature, select `OF_CONTROL` via Kconfig.
What is a Flattened Devicetree?
@@ -68,8 +68,16 @@ a binary file. U-Boot adds its own `fdtgrep` for creating subsets of the file.
Where do I get a devicetree file for my board?
----------------------------------------------
You may find that the Linux kernel has a suitable file. Look in the
kernel source in arch/<arch>/boot/dts.
The devicetree files and devicetree bindings are maintained as part of the Linux
kernel git repository. Traditionally, U-Boot placed copies of devicetree source
files from the Linux kernel into `arch/<arch>/dts/<name>.dts`. However, this
required each board maintainer to manually keep their devicetree in sync with
the Linux kernel and often led to divergence between these copies.
U-Boot rather maintains a Git subtree as `dts/upstream/` sub-directory. It is
regularly synced with the Linux kernel and hence no need for manual devicetree
sync. You may find that the `dts/upstream/` already has a suitable devicetree
file for your board. Look in `dts/upstream/src/<arch>/<vendor>`.
If not you might find other boards with suitable files that you can
modify to your needs. Look in the board directories for files with a
@@ -78,40 +86,58 @@ modify to your needs. Look in the board directories for files with a
Failing that, you could write one from scratch yourself!
Resyncing with devicetree-rebasing
----------------------------------
The devicetee-rebasing repository (dtrepo_) maintains a fork cum mirror copy of
devicetree files along with the bindings synced at every Linux kernel major
release or intermediate release candidates. The U-Boot maintainers regularly
sync the `dts/upstream/` subtree from the devicetree-rebasing repo whenever
the next branch opens (refer: :doc:`../release_cycle`) with the latest mainline
Linux kernel release. To sync the `dts/upstream/` subtree, run::
./dts/update-dts-subtree.sh pull <devicetree-rebasing-release-tag>
If required it is also possible to cherry-pick fixes from the
devicetree-rebasing repository prior to next sync, usage::
./dts/update-dts-subtree.sh pick <devicetree-rebasing-commit-id>
Configuration
-------------
Use::
SoC/board maintainers are encouraged to migrate to use synced copies from
`dts/upstream/src/<arch>/<vendor>`. To do that add `imply OF_UPSTREAM` for the
SoC being used via Kconfig and set `DEFAULT_DEVICE_TREE=<vendor>/<name>` when
prompted by Kconfig.
#define CONFIG_DEFAULT_DEVICE_TREE "<name>"
However, if `dts/upstream/` hasn't yet received devicetree source file for your
newly added board support then you can add corresponding devicetree source file
as `arch/<arch>/dts/<name>.dts`. To select that add `# CONFIG_OF_UPSTREAM is not
set` and set `DEFAULT_DEVICE_TREE=<name>` when prompted by Kconfig.
to set the filename of the devicetree source. Then put your devicetree
file into::
This should include your CPU or SoC's devicetree file. On top of that any U-Boot
specific tweaks (see: dttweaks_) can be made for your board.
arch/<arch>/dts/<name>.dts
This should include your CPU or SOC's devicetree file, placed in
`arch/<arch>/dts`, and then make any adjustments required using a u-boot-dtsi
file for your board.
If CONFIG_OF_EMBED is defined, then it will be picked up and built into
If `OF_EMBED` is selected by Kconfig, then it will be picked up and built into
the U-Boot image (including u-boot.bin). This is suitable for debugging
and development only and is not recommended for production devices.
If CONFIG_OF_SEPARATE is defined, then it will be built and placed in
If `OF_SEPARATE` is selected by Kconfig, then it will be built and placed in
a u-boot.dtb file alongside u-boot-nodtb.bin with the combined result placed
in u-boot.bin so you can still just flash u-boot.bin onto your board. If you are
using CONFIG_SPL_FRAMEWORK, then u-boot.img will be built to include the device
tree binary.
in u-boot.bin so you can still just flash u-boot.bin onto your board. If Kconfig
option `SPL_FRAMEWORK` is enabled, then u-boot.img will be built to include the
device tree binary.
If CONFIG_OF_BOARD is defined, a board-specific routine will provide the
If `OF_BOARD` is selected by Kconfig, a board-specific routine will provide the
devicetree at runtime, for example if an earlier bootloader stage creates
it and passes it to U-Boot.
If CONFIG_BLOBLIST is defined, the devicetree may come from a bloblist passed
from a previous stage, if present.
If `BLOBLIST` is selected by Kconfig, the devicetree may come from a bloblist
passed from a previous stage, if present.
If CONFIG_SANDBOX is defined, then it will be read from a file on
If `SANDBOX` is selected by Kconfig, then it will be read from a file on
startup. Use the -d flag to U-Boot to specify the file to read, -D for the
default and -T for the test devicetree, used to run sandbox unit tests.
@@ -145,7 +171,7 @@ Build:
After the board configuration is done, fdt supported u-boot can be built in two
ways:
# build the default dts which is defined from CONFIG_DEFAULT_DEVICE_TREE::
# build the default dts which is selected by DEFAULT_DEVICE_TREE Kconfig::
$ make
@@ -159,8 +185,9 @@ ways:
Adding tweaks for U-Boot
------------------------
It is strongly recommended that devicetree files in U-Boot are an exact copy of
those in Linux, so that it is easy to sync them up from time to time.
With `dts/upstream` Git subtree, it is ensured that devicetree files in U-Boot
are an exact copy of those in Linux kernel available under
`dts/upstream/src/<arch>/<vendor>`.
U-Boot is of course a very different project from Linux, e.g. it operates under
much more restrictive memory and code-size constraints. Where Linux may use a
@@ -173,8 +200,8 @@ constraints are even more extreme and the devicetree is shrunk to remove
unwanted nodes, or even turned into C code to avoid access overhead.
U-Boot automatically looks for and includes a file with updates to the standard
devicetree for your board, searching for them in the same directory as the
main file, in this order::
devicetree for your board, searching for them in `arch/<arch>/dts/` in this
order::
<orig_filename>-u-boot.dtsi
<CONFIG_SYS_SOC>-u-boot.dtsi
@@ -198,11 +225,53 @@ As mentioned above, the U-Boot build system automatically includes a
`*-u-boot.dtsi` file, if found, containing U-Boot specific
quirks. However, some data, such as the mentioned public keys, are not
appropriate for upstream U-Boot but are better kept and maintained
outside the U-Boot repository. You can use CONFIG_DEVICE_TREE_INCLUDES
to specify a list of .dtsi files that will also be included when
outside the U-Boot repository. You can use `DEVICE_TREE_INCLUDES` Kconfig
option to specify a list of .dtsi files that will also be included when
building .dtb files.
Devicetree bindings schema checks
---------------------------------
With devicetee-rebasing Git subtree, the devicetree bindings are also regularly
synced with Linux kernel as `dts/upstream/Bindings/` sub-directory. This
allows U-Boot to run devicetree bindings schema checks which will bring
compliance to U-Boot core/drivers regarding usage of devicetree.
Dependencies
~~~~~~~~~~~~
The DT schema project must be installed in order to validate the DT schema
binding documents and validate DTS files using the DT schema. For installation
instructions, refer to the DT schema project page (dtschema_).
Several executables (dt-doc-validate, dt-mk-schema, dt-validate) will be
installed. Ensure they are in your PATH (~/.local/bin by default).
You should also install yamllint (used by dtschema when present). On Debian/
Ubuntu systems::
apt install yamllint
Running checks
~~~~~~~~~~~~~~
In order to perform validation of DTB files, use the ``dtbs_check`` target::
make dtbs_check
It is also possible to run checks with a subset of matching schema files by
setting the ``DT_SCHEMA_FILES`` variable to 1 or more specific schema files or
patterns (partial match of a fixed string). Each file or pattern should be
separated by ':'.
::
make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml:rtc.yaml
make dtbs_check DT_SCHEMA_FILES=/gpio/
make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml
Relocation, SPL and TPL
-----------------------
@@ -213,14 +282,14 @@ The full devicetree is available to U-Boot proper, but normally only a subset
'SPL Support' in doc/driver-model/design.rst for more details.
Using several DTBs in the SPL (CONFIG_SPL_MULTI_DTB)
----------------------------------------------------
Using several DTBs in the SPL (SPL_MULTI_DTB_FIT Kconfig option)
----------------------------------------------------------------
In some rare cases it is desirable to let SPL be able to select one DTB among
many. This usually not very useful as the DTB for the SPL is small and usually
fits several platforms. However the DTB sometimes include information that do
work on several platforms (like IO tuning parameters).
In this case it is possible to use CONFIG_SPL_MULTI_DTB. This option appends to
the SPL a FIT image containing several DTBs listed in SPL_OF_LIST.
In this case it is possible to use SPL_MULTI_DTB_FIT Kconfig option. This option
appends to the SPL a FIT image containing several DTBs listed in SPL_OF_LIST.
board_fit_config_name_match() is called to select the right DTB.
If board_fit_config_name_match() relies on DM (DM driver to access an EEPROM
@@ -247,10 +316,10 @@ architectures.
It is important to understand that the fdt only selects options
available in the platform / drivers. It cannot add new drivers (yet). So
you must still have the CONFIG option to enable the driver. For example,
you need to define CONFIG_SYS_NS16550 to bring in the NS16550 driver,
you must still have the Kconfig option to enable the driver. For example,
you need to enable SYS_NS16550 Kconfig option to bring in the NS16550 driver,
but can use the fdt to specific the UART clock, peripheral address, etc.
In very broad terms, the CONFIG options in general control *what* driver
In very broad terms, the Kconfig options in general control *what* driver
files are pulled in, and the fdt controls *how* those files work.
History
@@ -264,8 +333,10 @@ used it before Linux (e.g. snow). The two projects developed in parallel
and there are still some differences in the bindings for certain boards.
While there has been discussion of having a separate repository for devicetree
files, in practice the Linux kernel Git repository has become the place where
these are stored, with U-Boot taking copies and adding tweaks with u-boot.dtsi
files.
these are stored, with U-Boot taking copies via devicetree-rebasing repo
(see: dtrepo_) and adding tweaks with u-boot.dtsi files.
.. _dtspec: https://www.devicetree.org/specifications/
.. _dtlist: https://www.spinics.net/lists/devicetree-compiler/
.. _dtrepo: https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
.. _dtschema: https://github.com/devicetree-org/dt-schema/tree/main
dts/Kconfig
+16
View File
@@ -85,6 +85,22 @@ config OF_LIVE
enables a live tree which is available after relocation,
and can be adjusted as needed.
config OF_UPSTREAM
bool "Enable use of devicetree imported from Linux kernel release"
help
Traditionally, U-Boot platforms used to have their custom devicetree
files or copy devicetree files from Linux kernel which are hard to
maintain and can usually get out-of-sync from Linux kernel. This
option enables platforms to migrate to devicetree-rebasing repo where
a regular sync will be maintained every major Linux kernel release
cycle. However, platforms can still have some custom u-boot specific
bits maintained as part of *-u-boot.dtsi files.
Note: This option should be set in Kconfig, for the SoC as a whole.
However, newer boards whose devicetree source files haven't landed in
the dts/upstream subtree, they can override this option to have the
DT build from existing U-Boot tree location instead.
choice
prompt "Provider of DTB for DT control"
depends on OF_CONTROL
dts/Makefile
+14 -3
View File
@@ -10,10 +10,20 @@ ifeq ($(DEVICE_TREE),)
DEVICE_TREE := unset
endif
ifeq ($(CONFIG_OF_UPSTREAM),y)
ifeq ($(CONFIG_ARM64),y)
dt_dir := dts/upstream/src/arm64
else
dt_dir := dts/upstream/src/$(ARCH)
endif
else
dt_dir := arch/$(ARCH)/dts
endif
ifneq ($(EXT_DTB),)
DTB := $(EXT_DTB)
else
DTB := arch/$(ARCH)/dts/$(DEVICE_TREE).dtb
DTB := $(dt_dir)/$(DEVICE_TREE).dtb
endif
$(obj)/dt-$(SPL_NAME).dtb: dts/dt.dtb $(objtree)/tools/fdtgrep FORCE
@@ -41,7 +51,7 @@ $(DTB): arch-dtbs
PHONY += arch-dtbs
arch-dtbs:
$(Q)$(MAKE) $(build)=arch/$(ARCH)/dts dtbs
$(Q)$(MAKE) $(build)=$(dt_dir) dtbs
ifeq ($(CONFIG_SPL_BUILD),y)
obj-$(CONFIG_OF_EMBED) := dt-spl.dtb.o
@@ -65,4 +75,5 @@ clean-files := dt.dtb.S
# Let clean descend into dts directories
subdir- += ../arch/arc/dts ../arch/arm/dts ../arch/m68k/dts ../arch/microblaze/dts \
../arch/mips/dts ../arch/nios2/dts ../arch/powerpc/dts ../arch/riscv/dts \
../arch/sandbox/dts ../arch/sh/dts ../arch/x86/dts ../arch/xtensa/dts
../arch/sandbox/dts ../arch/sh/dts ../arch/x86/dts ../arch/xtensa/dts \
./upstream/src/arm64 ./upstream/src/$(ARCH)
dts/update-dts-subtree.sh
Executable
+48
View File
@@ -0,0 +1,48 @@
#!/bin/sh
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright 2024 Linaro Ltd.
#
# Usage: from the top level U-Boot source tree, run:
# $ ./dts/update-dts-subtree.sh pull <release-tag>
# $ ./dts/update-dts-subtree.sh pick <commit-id>
#
# The script will pull changes from devicetree-rebasing repo into U-Boot
# as a subtree located as <U-Boot>/dts/upstream sub-directory. It will
# automatically create a squash/merge commit listing the commits imported.
set -e
merge_commit_msg=$(cat << EOF
Subtree merge tag '$2' of devicetree-rebasing repo [1] into dts/upstream
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/
EOF
)
remote_add_and_fetch() {
if ! git remote get-url devicetree-rebasing 2>/dev/null
then
echo "Warning: Script automatically adds new git remote via:"
echo " git remote add devicetree-rebasing \\"
echo " https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git"
git remote add devicetree-rebasing \
https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
fi
git fetch devicetree-rebasing master
}
if [ "$1" = "pull" ]
then
remote_add_and_fetch
git subtree pull --prefix dts/upstream devicetree-rebasing \
"$2" --squash -m "${merge_commit_msg}"
elif [ "$1" = "pick" ]
then
remote_add_and_fetch
git cherry-pick -x --strategy=subtree -Xsubtree=dts/upstream/ "$2"
else
echo "usage: $0 <op> <ref>"
echo " <op> pull or pick"
echo " <ref> release tag [pull] or commit id [pick]"
fi
dts/upstream/Bindings/Makefile
+3 -3
View File
@@ -47,9 +47,9 @@ quiet_cmd_mk_schema = SCHEMA $@
rm -f $$f
define rule_chkdt
$(if $(DT_SCHEMA_LINT),$(call cmd,yamllint),)
$(call cmd,chk_bindings)
$(call cmd,mk_schema)
$(if $(DT_SCHEMA_LINT),$(call echo-cmd,yamllint) $(cmd_yamllint),); \
$(call echo-cmd,chk_bindings) $(cmd_chk_bindings); \
$(call echo-cmd,mk_schema) $(cmd_mk_schema)
endef
DT_DOCS = $(patsubst $(srctree)/%,%,$(shell $(find_all_cmd)))
dts/upstream/src/arm64/Makefile
+14
View File
@@ -0,0 +1,14 @@
# SPDX-License-Identifier: GPL-2.0+
include $(srctree)/scripts/Makefile.dts
targets += $(dtb-y)
# Add any required device tree compiler flags here
DTC_FLAGS += -a 0x8
PHONY += dtbs
dtbs: $(addprefix $(obj)/, $(dtb-y))
@:
clean-files := */*.dtb */*.dtbo
scripts/Makefile.lib
+36 -14
View File
@@ -159,18 +159,20 @@ cpp_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(UBOOTINCLUDE) \
ld_flags = $(KBUILD_LDFLAGS) $(ldflags-y) $(LDFLAGS_$(@F))
# Try these files in order to find the U-Boot-specific .dtsi include file
u_boot_dtsi_options = $(strip $(wildcard $(dir $<)$(basename $(notdir $<))-u-boot.dtsi) \
$(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi) \
$(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi) \
$(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi) \
$(wildcard $(dir $<)u-boot.dtsi))
u_boot_dtsi_loc = $(srctree)/arch/$(ARCH)/dts/
u_boot_dtsi_options = $(strip $(wildcard $(u_boot_dtsi_loc)$(basename $(notdir $<))-u-boot.dtsi) \
$(wildcard $(u_boot_dtsi_loc)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi) \
$(wildcard $(u_boot_dtsi_loc)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi) \
$(wildcard $(u_boot_dtsi_loc)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi) \
$(wildcard $(u_boot_dtsi_loc)u-boot.dtsi))
u_boot_dtsi_options_raw = $(warning Automatic .dtsi inclusion: options: \
$(dir $<)$(basename $(notdir $<))-u-boot.dtsi \
$(dir $<)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi \
$(dir $<)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi \
$(dir $<)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi \
$(dir $<)u-boot.dtsi ... \
$(u_boot_dtsi_loc)$(basename $(notdir $<))-u-boot.dtsi \
$(u_boot_dtsi_loc)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi \
$(u_boot_dtsi_loc)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi \
$(u_boot_dtsi_loc)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi \
$(u_boot_dtsi_loc)u-boot.dtsi ... \
found: $(if $(u_boot_dtsi_options),"$(u_boot_dtsi_options)",nothing!))
# Uncomment for debugging
@@ -187,11 +189,17 @@ dtsi_include_list = $(strip $(u_boot_dtsi_options_debug) \
dtsi_include_list += $(CONFIG_DEVICE_TREE_INCLUDES)
# Modified for U-Boot
upstream_dtsi_include = $(addprefix -I, $(srctree)/dts/upstream/src/ \
$(sort $(dir $(wildcard $(srctree)/dts/upstream/src/$(ARCH)/*/*))) \
$(if (CONFIG_ARM64), \
$(sort $(dir $(wildcard $(srctree)/dts/upstream/src/arm64/*/*)))))
dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc \
$(UBOOTINCLUDE) \
-I$(dir $<) \
-I$(u_boot_dtsi_loc) \
-I$(srctree)/arch/$(ARCH)/dts/include \
-I$(srctree)/include \
$(upstream_dtsi_include) \
-D__ASSEMBLY__ \
-undef -D__DTS__
@@ -328,7 +336,7 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
echo '$(pound)include "$(f)"' >> $(pre-tmp);) \
$(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $(pre-tmp) ; \
$(DTC) -O dtb -o $@ -b 0 \
-i $(dir $<) $(DTC_FLAGS) \
-i $(dir $<) -i $(u_boot_dtsi_loc) $(DTC_FLAGS) \
-d $(depfile).dtc.tmp $(dtc-tmp) || \
(echo "Check $(shell pwd)/$(pre-tmp) for errors" && false) \
; \
@@ -350,14 +358,28 @@ capsule_esl_input_file=$(srctree)/lib/efi_loader/capsule_esl.dtsi.in
capsule_esl_dtsi = .capsule_esl.dtsi
capsule_esl_path=$(abspath $(srctree)/$(subst $(quote),,$(CONFIG_EFI_CAPSULE_ESL_FILE)))
dtsi_include_list_deps := $(addprefix $(u_boot_dtsi_loc),$(subst $(quote),,$(dtsi_include_list)))
ifdef CONFIG_EFI_CAPSULE_AUTHENTICATE
dtsi_include_list += $(capsule_esl_dtsi)
dtsi_include_list_deps += $(obj)/$(capsule_esl_dtsi)
endif
dtsi_include_list_deps = $(addprefix $(obj)/,$(subst $(quote),,$(dtsi_include_list)))
ifneq ($(CHECK_DTBS),)
DT_CHECKER ?= dt-validate
DT_CHECKER_FLAGS ?= $(if $(DT_SCHEMA_FILES),-l $(DT_SCHEMA_FILES),-m)
DT_BINDING_DIR := dts/upstream/Bindings
DT_TMP_SCHEMA := $(objtree)/$(DT_BINDING_DIR)/processed-schema.json
$(obj)/%.dtb: $(src)/%.dts $(DTC) $(dtsi_include_list_deps) FORCE
$(call if_changed_dep,dtc)
quiet_cmd_dtb = DTC_CHK $@
cmd_dtb = $(cmd_dtc) ; $(DT_CHECKER) $(DT_CHECKER_FLAGS) -u $(srctree)/$(DT_BINDING_DIR) -p $(DT_TMP_SCHEMA) $@ || true
else
quiet_cmd_dtb = $(quiet_cmd_dtc)
cmd_dtb = $(cmd_dtc)
endif
$(obj)/%.dtb: $(src)/%.dts $(DTC) $(dtsi_include_list_deps) $(DT_TMP_SCHEMA) FORCE
$(call if_changed_dep,dtb)
pre-tmp = $(subst $(comma),_,$(dot-target).pre.tmp)
dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)