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spi: xilinx_spi: Fix spi reset

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It was incorrectly using an old priv->regs pointer, which was
initialized to zero. SPI resets won't happen on first call.

Signed-off-by: Jiajie Chen <c@jia.je>
Link: https://lore.kernel.org/r/20230227150938.211820-1-c@jia.je
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Jiajie Chen
2023-03-09 13:15:00 +01:00
committed by Michal Simek
parent dd0ebfe8a4
commit 4fffbc1108
1 changed files with 2 additions and 3 deletions
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drivers/spi/xilinx_spi.c
+2 -3
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@@ -112,10 +112,9 @@ struct xilinx_spi_priv {
static int xilinx_spi_probe(struct udevice *bus)
{
struct xilinx_spi_priv *priv = dev_get_priv(bus);
struct xilinx_spi_regs *regs = priv->regs;
priv->regs = (struct xilinx_spi_regs *)dev_read_addr(bus);
struct xilinx_spi_regs *regs;
regs = priv->regs = (struct xilinx_spi_regs *)dev_read_addr(bus);
priv->fifo_depth = dev_read_u32_default(bus, "fifo-size", 0);
writel(SPISSR_RESET_VALUE, &regs->srr);