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xilinx: mbv: Add missing mmu-type cpu property

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OpenSBI expects mmu-type to be present in DT that's why add it. Without it
OpenSBI disable CPU node which ends up in not working boot.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This commit is contained in:
Michal Simek
2025-08-14 14:32:00 +08:00
committed by Leo Yu-Chi Liang
parent 5f5bba72c2
commit 441ac08142
2 changed files with 4 additions and 2 deletions
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arch/riscv/dts/xilinx-mbv32.dts
+2 -1
View File
@@ -2,7 +2,7 @@
/*
* dts file for AMD MicroBlaze V
*
* (C) Copyright 2023, Advanced Micro Devices, Inc.
* (C) Copyright 2023 - 2025, Advanced Micro Devices, Inc.
*
* Michal Simek <michal.simek@amd.com>
*/
@@ -26,6 +26,7 @@
device_type = "cpu";
reg = <0>;
riscv,isa = "rv32imafdc";
mmu-type = "riscv,sv39";
i-cache-size = <32768>;
d-cache-size = <32768>;
clock-frequency = <100000000>;
arch/riscv/dts/xilinx-mbv64.dts
+2 -1
View File
@@ -2,7 +2,7 @@
/*
* dts file for AMD MicroBlaze V
*
* (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc.
* (C) Copyright 2023 - 2025, Advanced Micro Devices, Inc.
*
* Michal Simek <michal.simek@amd.com>
*/
@@ -26,6 +26,7 @@
device_type = "cpu";
reg = <0>;
riscv,isa = "rv64imafdc";
mmu-type = "riscv,sv39";
i-cache-size = <32768>;
d-cache-size = <32768>;
clock-frequency = <100000000>;