grm: axiado: Add AX3005 based SCM3005 board support
Introduce mach-axiado to support Axiado SoC-based boards. This adds the platform Kconfig and build infrastructure, along with initial SCM3005 board support using the AX3005 SoC. Introduces AXIADO_AX3005, which selects ARM64, driver model, GIC-v3, and Zynq UART. TARGET_SCM3005 selects ARCH_AXIADO, allowing future SoC variants to share the platform configuration. Secondary cores use spin-table boot. ft_board_setup() corrects the cpu-release-addr in the FDT, which arch_fixup_fdt() overwrites with the post-relocation address. Add U-Boot board support for the Axiado AX3005 based targets, a quad-core ARM Cortex-A53 (ARMv8) platform. Tested-by: Siu Ming Tong <smtong@axiado.com> Signed-off-by: Karthikeyan Mitran <kmitran@axiado.com> Signed-off-by: Siu Ming Tong <smtong@axiado.com>
This commit is contained in:
Siu Ming Tong
Tom Rini
+11
@@ -213,6 +213,17 @@ F: drivers/reset/reset-ast2500.c
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F: drivers/watchdog/ast_wdt.c
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N: aspeed
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ARM AXIADO AX3005 SCM3005
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M: Siu Ming Tong <smtong@axiado.com>
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M: Karthikeyan Mitran <kmitran@axiado.com>
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M: Prasad Bolisetty <pbolisetty@axiado.com>
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S: Maintained
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F: arch/arm/dts/ax3005*
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F: arch/arm/mach-axiado/
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F: board/axiado/scm3005/
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F: configs/ax3005_scm3005_defconfig
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F: include/configs/ax3005-scm3005.h
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ARM BROADCOM BCM283X / BCM27XX
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M: Matthias Brugger <mbrugger@suse.com>
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M: Peter Robinson <pbrobinson@gmail.com>
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@@ -2152,6 +2152,13 @@ config ARCH_ASPEED
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select OF_CONTROL
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imply CMD_DM
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config ARCH_AXIADO
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bool "Support Axiado SoCs"
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select AXIADO_AX3005
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help
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Support for Axiado AX-series SoCs such as the AX3005.
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These ARM64 SoCs are used in BMC and security applications.
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config TARGET_DURIAN
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bool "Support Phytium Durian Platform"
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select ARM64
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@@ -2293,6 +2300,8 @@ source "arch/arm/mach-aspeed/Kconfig"
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source "arch/arm/mach-at91/Kconfig"
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source "arch/arm/mach-axiado/Kconfig"
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source "arch/arm/mach-bcm283x/Kconfig"
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source "arch/arm/mach-bcmbca/Kconfig"
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@@ -0,0 +1,22 @@
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if ARCH_AXIADO
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config SYS_ARCH
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default "arm"
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config SYS_SOC
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default "axiado"
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config AXIADO_AX3005
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bool
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select ARM64
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select ARMV8_SWITCH_TO_EL1
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select DM
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select DM_SERIAL
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select GICV3
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select ZYNQ_SERIAL
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select MMC_SDHCI_AXIADO
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select PHY_AXIADO_EMMC
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source "arch/arm/mach-axiado/scm3005/Kconfig"
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endif
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@@ -0,0 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
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#
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obj-$(CONFIG_AXIADO_AX3005) += scm3005/
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@@ -0,0 +1,11 @@
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if AXIADO_AX3005
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config TARGET_SCM3005
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bool "Support Axiado AX3005 SCM3005"
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help
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Support for the Axiado AX3005 SCM3005 board.
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Based on the Axiado AX3005 quad-core ARMv8 Cortex-A53 SoC.
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source "board/axiado/scm3005/Kconfig"
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endif
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@@ -0,0 +1,15 @@
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if TARGET_SCM3005
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config SYS_BOARD
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string
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default "scm3005"
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config SYS_VENDOR
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string
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default "axiado"
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config SYS_CONFIG_NAME
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string
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default "ax3005-scm3005"
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endif
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@@ -0,0 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
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obj-y := scm3005.o
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@@ -0,0 +1,128 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
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*/
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#include <config.h>
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#include <dm.h>
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#include <init.h>
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#include <asm/global_data.h>
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#include <asm/armv8/mmu.h>
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#include <asm/io.h>
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#include <asm/spin_table.h>
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#include <asm/system.h>
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#include <fdt_support.h>
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DECLARE_GLOBAL_DATA_PTR;
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static struct mm_region axiado_ax3005_mem_map[] = {
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{ /* Peripherals including UART */
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.virt = 0x00000000UL,
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.phys = 0x00000000UL,
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.size = 0x4A000000UL, /* 0 to 0x4A000000: peripherals */
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN },
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{ .virt = 0x80000000UL,
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.phys = 0x80000000UL,
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.size = 0x80000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE },
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{
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0,
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}
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};
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struct mm_region *mem_map = axiado_ax3005_mem_map;
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/*
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* Accept any FIT configuration name - the board loads a single FIT image
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* and the first matching config is used.
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*/
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int board_fit_config_name_match(const char *name)
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{
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return 0;
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}
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/*
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* ft_board_setup - restore cpu-release-addr after relocation
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*
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* arch_fixup_fdt() / spin_table_update_dt() overwrites cpu-release-addr
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* with U-Boot's relocated address. Restore the pre-relocation physical
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* address so secondary cores spin on the correct location.
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*/
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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int cpus_offset, offset;
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const char *prop;
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int ret;
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u64 cpu_release_addr = (u64)&spin_table_cpu_release_addr - gd->reloc_off;
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cpus_offset = fdt_path_offset(blob, "/cpus");
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if (cpus_offset < 0)
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return 0;
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for (offset = fdt_first_subnode(blob, cpus_offset); offset >= 0;
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offset = fdt_next_subnode(blob, offset)) {
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prop = fdt_getprop(blob, offset, "device_type", NULL);
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if (!prop || strcmp(prop, "cpu"))
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continue;
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prop = fdt_getprop(blob, offset, "enable-method", NULL);
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if (!prop || strcmp(prop, "spin-table"))
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continue;
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ret = fdt_setprop_u64(blob, offset, "cpu-release-addr",
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cpu_release_addr);
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if (ret) {
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printf("WARNING: Failed to restore cpu-release-addr\n");
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return ret;
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}
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}
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return 0;
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}
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/*
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* dram_init - DDR is initialized by firmware, just setting size
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*/
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
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CFG_SYS_SDRAM_SIZE);
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return 0;
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}
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/*
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* the SOC uses single bank, non-interleaving
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*/
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].size = CFG_SYS_SDRAM_SIZE;
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return 0;
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}
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/*
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* timer_init - enable the AX3005 platform system timer
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*
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* CNTFRQ_EL0 is already set by arch/arm/cpu/armv8/start.S using
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* CONFIG_COUNTER_FREQUENCY from the defconfig.
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*
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* SYS_TIMER_CTRL (0x48016000) is the AX3005 system timer control
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* register — writing SYS_TIMER_ENABLE starts the counter that feeds
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* the ARM generic timer.
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*/
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int timer_init(void)
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{
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writel(SYS_TIMER_ENABLE, SYS_TIMER_CTRL);
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return 0;
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}
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int board_init(void)
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{
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return 0;
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}
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void reset_cpu(void)
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{
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/* For later ARM_PSCI_FW or watchdog reset */
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}
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@@ -0,0 +1,74 @@
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CONFIG_ARM=y
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CONFIG_ARCH_AXIADO=y
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CONFIG_POSITION_INDEPENDENT=y
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CONFIG_TEXT_BASE=0x80000000
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CONFIG_SYS_MONITOR_BASE=0x80000000
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CONFIG_SYS_LOAD_ADDR=0x80100000
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CONFIG_SYS_MALLOC_F_LEN=0x8000
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CONFIG_SYS_MALLOC_LEN=0x20000
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CONFIG_SYS_BOOTM_LEN=0x20000000
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CONFIG_ENV_SIZE=0x10000
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CONFIG_ENV_OFFSET=0x5000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_COUNTER_FREQUENCY=1000000000
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CONFIG_ARMV8_MULTIENTRY=y
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CONFIG_ARMV8_SET_SMPEN=y
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CONFIG_ARMV8_SPIN_TABLE=y
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CONFIG_SYS_CUSTOM_LDSCRIPT=y
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CONFIG_SYS_LDSCRIPT="arch/arm/cpu/armv8/u-boot.lds"
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CONFIG_BOOTDELAY=5
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CONFIG_FIT=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_USE_PREBOOT=y
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CONFIG_DEFAULT_FDT_FILE="ax3005-scm3005.dtb"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PROMPT="Axiado> "
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CONFIG_AUTOBOOT_KEYED=y
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CONFIG_AUTOBOOT_PROMPT="Press \"<Esc><Esc>\" to stop autobooting in %d seconds\n"
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CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyPS3,115200 maxcpus=4 nr_cpus=4 earlycon hugepages=16 root=/dev/ram rw phram.phram=ramrofs,0x80B00000,0x6400000"
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CONFIG_USE_BOOTCOMMAND=y
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CONFIG_BOOTCOMMAND="bootm ${loadaddr}"
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CONFIG_SYS_VENDOR="axiado"
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CONFIG_SYS_BOARD="scm3005"
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CONFIG_SYS_CONFIG_NAME="ax3005-scm3005"
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# CONFIG_CMD_BOOTEFI is not set
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# CONFIG_CMD_ELF is not set
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# CONFIG_CMD_GO is not set
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CONFIG_CMD_NVEDIT_EFI=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_SYS_ALT_MEMTEST=y
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CONFIG_CMD_CLK=y
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CONFIG_CMD_DFU=y
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CONFIG_CMD_DM=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_GPT_RENAME=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_PART=y
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_OF_CONTROL=y
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CONFIG_OF_SEPARATE=y
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CONFIG_DEFAULT_DEVICE_TREE="ax3005-scm3005"
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CONFIG_MULTI_DTB_FIT=y
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# CONFIG_ENV_IS_IN_MMC is not set
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CONFIG_DM_MMC=y
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# CONFIG_SUPPORT_EMMC_BOOT is not set
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CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_TARGET_SCM3005=y
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CONFIG_CLK=y
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CONFIG_LZMA=y
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CONFIG_XZ=y
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CONFIG_ZYNQ_SERIAL=y
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# CONFIG_AUTO_COMPLETE is not set
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# CONFIG_SYS_LONGHELP is not set
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# CONFIG_TOOLS_MKEFICAPSULE is not set
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@@ -0,0 +1,29 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
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*/
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#ifndef __AX3005_SCM3005_H
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#define __AX3005_SCM3005_H
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#include <linux/sizes.h>
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#define GICD_BASE 0x40400000
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#define GICR_BASE 0x40500000
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#define SYS_TIMER_CTRL 0x48016000
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#define SYS_TIMER_ENABLE 0x1
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#define SYS_TIMER_DISABLE 0x0
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/* DRAM: 2 GB at 0x80000000 */
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#define CFG_SYS_SDRAM_BASE 0x80000000
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#define CFG_SYS_SDRAM_SIZE SZ_2G
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#define CFG_SYS_INIT_SP_ADDR (CFG_SYS_SDRAM_BASE + SZ_1M)
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#define CFG_SYS_MAXARGS 64
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#define CFG_SYS_BARGSIZE CFG_SYS_CBSIZE
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#define CFG_SYS_BAUDRATE_TABLE \
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{ 4800, 9600, 19200, 38400, 57600, 115200 }
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#endif /* __AX3005_SCM3005_H */
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