Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Various fixes for smatch warnings, the i2c one might be also coming in via Heiko / I2C tree, let me know if there is conflict. There is also W77Q51NW SPI NOR ID support, with the DT portion omitted for now.
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@@ -33,6 +33,7 @@ CONFIG_PCI_REGION_MULTI_ENTRY=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_RENESAS_RAVB=y
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CONFIG_SPI_FLASH_WINBOND=y
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_HAVE_INIT_STACK=y
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@@ -92,7 +92,8 @@ int rcar_clk_set_rate64_div_table(unsigned int parent, u64 parent_rate, ulong ra
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void __iomem *reg, const u32 mask,
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const struct clk_div_table *table, char *name)
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{
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u32 value = 0, div = 0;
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u32 div;
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int value;
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div = DIV_ROUND_CLOSEST(parent_rate, rate);
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value = rcar_clk_get_table_val(table, div);
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@@ -101,7 +102,7 @@ int rcar_clk_set_rate64_div_table(unsigned int parent, u64 parent_rate, ulong ra
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clrsetbits_le32(reg, mask, field_prep(mask, value));
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debug("%s[%i] %s clk: parent=%i div=%u rate=%lu => val=%u\n",
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debug("%s[%i] %s clk: parent=%i div=%u rate=%lu => val=%d\n",
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__func__, __LINE__, name, parent, div, rate, value);
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return 0;
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@@ -591,6 +591,7 @@ const struct flash_info spi_nor_ids[] = {
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{ INFO("w25m512jw", 0xef6119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ INFO("w25h02jv", 0xef9022, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ INFO("w77q51nw", 0xef8a1a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
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#endif
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#ifdef CONFIG_SPI_FLASH_XMC
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/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
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@@ -1110,8 +1110,10 @@ static int rswitch_probe(struct udevice *dev)
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return -EINVAL;
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priv->rsw_clk = devm_clk_get(dev, NULL);
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if (ret)
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if (IS_ERR(priv->rsw_clk)) {
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ret = PTR_ERR(priv->rsw_clk);
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goto err_map;
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}
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ret = clk_prepare_enable(priv->rsw_clk);
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if (ret)
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