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board: bcm96846: Switch to using OF_UPSTREAM

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This board clearly develops first in Linux which had more
hardware listed, so let's start to use OF_UPSTREAM.
This makes the NAND driver work.

Suggested-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij
2024-10-12 18:10:57 +02:00
committed by Michael Trimarchi
parent 4c6f2ab29a
commit 25e46f8281
4 changed files with 3 additions and 134 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/dts/bcm6846.dtsi
-103
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@@ -1,103 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2022 Broadcom Ltd.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "brcm,bcm6846", "brcm,bcmbca";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
CA7_0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x0>;
next-level-cache = <&L2_0>;
enable-method = "psci";
};
CA7_1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x1>;
next-level-cache = <&L2_0>;
enable-method = "psci";
};
L2_0: l2-cache0 {
compatible = "cache";
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
arm,cpu-registers-not-fw-configured;
};
pmu: pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&CA7_0>, <&CA7_1>;
};
clocks: clocks {
periph_clk: periph-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
};
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
axi@81000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x81000000 0x8000>;
gic: interrupt-controller@1000 {
compatible = "arm,cortex-a7-gic";
#interrupt-cells = <3>;
interrupt-controller;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
reg = <0x1000 0x1000>,
<0x2000 0x2000>,
<0x4000 0x2000>,
<0x6000 0x2000>;
};
};
bus@ff800000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xff800000 0x800000>;
uart0: serial@640 {
compatible = "brcm,bcm6345-uart";
reg = <0x640 0x1b>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&periph_clk>;
clock-names = "refclk";
status = "disabled";
};
};
};
arch/arm/dts/bcm96846.dts
-30
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@@ -1,30 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2022 Broadcom Ltd.
*/
/dts-v1/;
#include "bcm6846.dtsi"
/ {
model = "Broadcom BCM96846 Reference Board";
compatible = "brcm,bcm96846", "brcm,bcm6846", "brcm,bcmbca";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x08000000>;
};
};
&uart0 {
status = "okay";
};
arch/arm/mach-bcmbca/bcm6846/Kconfig
+1
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@@ -8,6 +8,7 @@ if BCM6846
config TARGET_BCM96846
bool "Broadcom 6846 Reference Board"
depends on ARCH_BCMBCA
imply OF_UPSTREAM
imply MTD_RAW_NAND
imply NAND_BRCMNAND
imply NAND_BRCMNAND_BCMBCA
configs/bcm96846_defconfig
+2 -1
View File
@@ -9,11 +9,12 @@ CONFIG_TARGET_BCM96846=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="bcm96846"
CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcm96846"
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM6846"
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_OF_UPSTREAM=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y