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usb: gadget: bcm_udc_otg: Remove unused driver

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This driver is unused since the removal of the bcm28155_ap board in
commit 0f6807e77b ("arm: Remove bcm28155_ap board"). Remove it.

Fixes: 0f6807e77b ("arm: Remove bcm28155_ap board")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
This commit is contained in:
Tom Rini
2025-09-26 00:06:00 +02:00
committed by Marek Vasut
parent 70553ec85f
commit 219751e8c7
4 changed files with 0 additions and 79 deletions
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drivers/usb/gadget/Kconfig
-5
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@@ -99,11 +99,6 @@ config USB_GADGET_ATMEL_USBA
USBA is the integrated high-speed USB Device controller on
the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel.
config USB_GADGET_BCM_UDC_OTG_PHY
bool "Broadcom UDC OTG PHY"
help
Enable the Broadcom UDC OTG physical device interface.
config USB_GADGET_AT91
bool "Atmel AT91 USB Gadget Controller"
depends on ARCH_AT91
drivers/usb/gadget/Makefile
-1
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@@ -17,7 +17,6 @@ endif
ifdef CONFIG_USB_GADGET
obj-$(CONFIG_USB_GADGET_AT91) += at91_udc.o
obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o
obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o
obj-$(CONFIG_USB_GADGET_DWC2_OTG) += dwc2_udc_otg.o
obj-$(CONFIG_USB_GADGET_DWC2_OTG_PHY) += dwc2_udc_otg_phy.o
obj-$(CONFIG_USB_GADGET_MAX3420) += max3420_udc.o
drivers/usb/gadget/bcm_udc_otg.h
-19
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@@ -1,19 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2015 Broadcom Corporation.
*/
#ifndef __BCM_UDC_OTG_H
#define __BCM_UDC_OTG_H
static inline void wfld_set(uintptr_t addr, uint32_t fld_val, uint32_t fld_mask)
{
writel(((readl(addr) & ~(fld_mask)) | (fld_val)), (addr));
}
static inline void wfld_clear(uintptr_t addr, uint32_t fld_mask)
{
writel((readl(addr) & ~(fld_mask)), (addr));
}
#endif
drivers/usb/gadget/bcm_udc_otg_phy.c
-54
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@@ -1,54 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2015 Broadcom Corporation.
*/
#include <config.h>
#include <asm/io.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
#include <linux/delay.h>
#include "dwc2_udc_otg_priv.h"
#include "bcm_udc_otg.h"
void otg_phy_init(struct dwc2_udc *dev)
{
/* turn on the USB OTG clocks */
clk_usb_otg_enable((void *)HSOTG_BASE_ADDR);
/* set Phy to driving mode */
wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK);
udelay(100);
/* clear Soft Disconnect */
wfld_clear(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET,
HSOTG_DCTL_SFTDISCON_MASK);
/* invoke Reset (active low) */
wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK);
/* Reset needs to be asserted for 2ms */
udelay(2000);
/* release Reset */
wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK,
HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK);
}
void otg_phy_off(struct dwc2_udc *dev)
{
/* Soft Disconnect */
wfld_set(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET,
HSOTG_DCTL_SFTDISCON_MASK,
HSOTG_DCTL_SFTDISCON_MASK);
/* set Phy to non-driving (reset) mode */
wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK,
HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK);
}