vhaudiquet/u-boot-krane
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge tag 'u-boot-imx-next-20240902' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next

Browse Source 
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22211

- Enable SPI NOR flash support and MTD partitions for phycore_imx8mp.
- Convert mx6slevk to OF_UPSTREAM and watchdog DM.
- Cleanup some mx5/mx6 USB options.
- Make PLL settings configurable at board level.
- Set CONFIG_SPL_LOAD_FIT_ADDRESS for verdin-imx8m/p.
- Make the mxc-gpio reading state of GPIO pins in output mode to be
  consistent with the Linux kernel.
- Add HUK derivation support for ELE AHAB.
This commit is contained in:
Tom Rini
2024-09-02 16:03:02 -06:00
parent b977af178f d134909722
commit 11beb9fe0f
80 changed files with 208 additions and 3134 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/dts/imx6sl-evk.dts
-658
View File
@@ -1,658 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
//
//Copyright (C) 2013 Freescale Semiconductor, Inc.
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "imx6sl.dtsi"
/ {
model = "Freescale i.MX6 SoloLite EVK Board";
compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
chosen {
stdout-path = &uart1;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
backlight_display: backlight_display {
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
label = "debug";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&swbst_reg>;
};
reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg2_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&swbst_reg>;
};
reg_aud3v: regulator-aud3v {
compatible = "regulator-fixed";
regulator-name = "wm8962-supply-3v15";
regulator-min-microvolt = <3150000>;
regulator-max-microvolt = <3150000>;
regulator-boot-on;
};
reg_aud4v: regulator-aud4v {
compatible = "regulator-fixed";
regulator-name = "wm8962-supply-4v2";
regulator-min-microvolt = <4325000>;
regulator-max-microvolt = <4325000>;
regulator-boot-on;
};
reg_lcd_3v3: regulator-lcd-3v3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
regulator-name = "lcd-3v3";
gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_lcd_5v: regulator-lcd-5v {
compatible = "regulator-fixed";
regulator-name = "lcd-5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
sound {
compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hp>;
model = "wm8962-audio";
ssi-controller = <&ssi2>;
audio-codec = <&codec>;
audio-routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"Ext Spk", "SPKOUTL",
"Ext Spk", "SPKOUTR",
"AMIC", "MICBIAS",
"IN3R", "AMIC";
mux-int-port = <2>;
mux-ext-port = <3>;
hp-det-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
};
panel {
compatible = "sii,43wvf1g";
backlight = <&backlight_display>;
dvdd-supply = <&reg_lcd_3v3>;
avdd-supply = <&reg_lcd_5v>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux3>;
status = "okay";
};
&ecspi1 {
cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;
};
};
&fec {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_fec>;
pinctrl-1 = <&pinctrl_fec_sleep>;
phy-mode = "rmii";
status = "okay";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic: pfuze100@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;
regulators {
sw1a_reg: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw1c_reg: sw1c {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw2_reg: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
sw3a_reg: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
sw3b_reg: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
swbst_reg: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
};
snvs_reg: vsnvs {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
regulator-always-on;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
vgen4_reg: vgen4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen5_reg: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen6_reg: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
codec: wm8962@1a {
compatible = "wlf,wm8962";
reg = <0x1a>;
clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
DCVDD-supply = <&vgen3_reg>;
DBVDD-supply = <&reg_aud3v>;
AVDD-supply = <&vgen3_reg>;
CPVDD-supply = <&vgen3_reg>;
MICVDD-supply = <&reg_aud3v>;
PLLVDD-supply = <&vgen3_reg>;
SPKVDD1-supply = <&reg_aud4v>;
SPKVDD2-supply = <&reg_aud4v>;
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
imx6sl-evk {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059
MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
>;
};
pinctrl_audmux3: audmux3grp {
fsl,pins = <
MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0
MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0
MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0
MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000
>;
};
pinctrl_fec: fecgrp {
fsl,pins = <
MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0
MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0
MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0
MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0
MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0
MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0
MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0
MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0
MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8
>;
};
pinctrl_fec_sleep: fecgrp-sleep {
fsl,pins = <
MX6SL_PAD_FEC_MDC__GPIO4_IO23 0x3080
MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x3080
MX6SL_PAD_FEC_RXD0__GPIO4_IO17 0x3080
MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x3080
MX6SL_PAD_FEC_TX_EN__GPIO4_IO22 0x3080
MX6SL_PAD_FEC_TXD0__GPIO4_IO24 0x3080
MX6SL_PAD_FEC_TXD1__GPIO4_IO16 0x3080
MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 0x3080
>;
};
pinctrl_hp: hpgrp {
fsl,pins = <
MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1
MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_kpp: kppgrp {
fsl,pins = <
MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010
MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010
MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0
MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0
MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0
MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0
>;
};
pinctrl_lcd: lcdgrp {
fsl,pins = <
MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0
MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0
MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0
MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0
MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0
MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0
MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0
MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0
MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0
MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0
MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0
MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0
MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0
MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0
MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0
MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0
MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0
MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0
MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0
MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0
MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0
MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0
MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0
MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0
MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0
MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0
MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0
MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0
>;
};
pinctrl_led: ledgrp {
fsl,pins = <
MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
>;
};
pinctrl_pwm1: pwmgrp {
fsl,pins = <
MX6SL_PAD_PWM1__PWM1_OUT 0x110b0
>;
};
pinctrl_reg_lcd_3v3: reglcd3v3grp {
fsl,pins = <
MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x17059
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
>;
};
pinctrl_usbotg1: usbotg1grp {
fsl,pins = <
MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059
MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059
MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059
MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059
MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059
MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059
MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059
MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059
MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
>;
};
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
fsl,pins = <
MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
fsl,pins = <
MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
>;
};
pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
fsl,pins = <
MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
>;
};
pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
fsl,pins = <
MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
fsl,pins = <
MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
fsl,pins = <
MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
>;
};
};
};
&kpp {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_kpp>;
linux,keymap = <
MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */
MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */
MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */
MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */
MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */
MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */
MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */
>;
status = "okay";
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd>;
status = "okay";
port {
display_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
&pwm1 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&reg_vdd1p1 {
vin-supply = <&sw2_reg>;
};
&reg_vdd2p5 {
vin-supply = <&sw2_reg>;
};
&snvs_poweroff {
status = "okay";
};
&ssi2 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&usbotg1 {
vbus-supply = <&reg_usb_otg1_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg1>;
disable-over-current;
status = "okay";
};
&usbotg2 {
vbus-supply = <&reg_usb_otg2_vbus>;
dr_mode = "host";
disable-over-current;
status = "okay";
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
bus-width = <8>;
cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
status = "okay";
};
arch/arm/dts/imx6sl-pinfunc.h
-1073
View File
File diff suppressed because it is too large Load Diff
arch/arm/dts/imx6sl.dtsi
-1005
View File
File diff suppressed because it is too large Load Diff
arch/arm/include/asm/mach-imx/ele_api.h
+2
View File
@@ -26,6 +26,7 @@
#define ELE_GET_EVENTS_REQ (0xA2)
#define ELE_COMMIT_REQ (0xA8)
#define ELE_START_RNG (0xA3)
#define ELE_CMD_DERIVE_KEY (0xA9)
#define ELE_GENERATE_DEK_BLOB (0xAF)
#define ELE_ENABLE_PATCH_REQ (0xC3)
#define ELE_RELEASE_RDC_REQ (0xC4)
@@ -143,6 +144,7 @@ int ele_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 fuse_num, u32 *respon
int ele_release_caam(u32 core_did, u32 *response);
int ele_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response);
int ele_get_events(u32 *events, u32 *events_cnt, u32 *response);
int ele_derive_huk(u8 *key, size_t key_size, u8 *ctx, size_t seed_size);
int ele_commit(u16 fuse_id, u32 *response, u32 *info_type);
int ele_generate_dek_blob(u32 key_id, u32 src_paddr, u32 dst_paddr, u32 max_output_size);
int ele_dump_buffer(u32 *buffer, u32 buffer_length);
arch/arm/mach-imx/Kconfig
+4
View File
@@ -1,6 +1,8 @@
config MACH_IMX
bool
if MACH_IMX
config HAS_CAAM
bool
@@ -200,3 +202,5 @@ config IOMUX_LPSR
config IOMUX_SHARE_CONF_REG
bool
endif
arch/arm/mach-imx/ele_ahab.c
+31
View File
@@ -624,6 +624,31 @@ static int do_ahab_return_lifecycle(struct cmd_tbl *cmdtp, int flag, int argc, c
return CMD_RET_SUCCESS;
}
static int do_ahab_derive(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
ulong key;
size_t key_size;
char seed[] = "_ELE_AHAB_SEED_";
if (argc != 3)
return CMD_RET_USAGE;
key = hextoul(argv[1], NULL);
key_size = simple_strtoul(argv[2], NULL, 10);
if (key_size != 16 && key_size != 32) {
printf("key size can only be 16 or 32\n");
return CMD_RET_FAILURE;
}
if (ele_derive_huk((u8 *)key, key_size, seed, sizeof(seed))) {
printf("Error in AHAB derive\n");
return CMD_RET_FAILURE;
}
return CMD_RET_SUCCESS;
}
static int do_ahab_commit(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -680,6 +705,12 @@ U_BOOT_CMD(ahab_return_lifecycle, CONFIG_SYS_MAXARGS, 1, do_ahab_return_lifecycl
"addr - Return lifecycle message block signed by OEM SRK\n"
);
U_BOOT_CMD(ahab_derive, CONFIG_SYS_MAXARGS, 3, do_ahab_derive,
"Derive the hardware unique key",
"addr [16|32]\n"
"Store at addr the derivation of the HUK on 16 or 32 bytes.\n"
);
U_BOOT_CMD(ahab_commit, CONFIG_SYS_MAXARGS, 1, do_ahab_commit,
"commit into the fuses any new SRK revocation and FW version information\n"
"that have been found into the NXP (ELE FW) and OEM containers",
arch/arm/mach-imx/imx8m/clock_imx8mm.c
+10 -1
View File
@@ -181,10 +181,19 @@ void dram_disable_bypass(void)
}
#endif
int intpll_configure(enum pll_clocks pll, ulong freq)
__weak int board_imx_intpll_override(enum pll_clocks pll, ulong *freq)
{
return 0;
}
static int intpll_configure(enum pll_clocks pll, ulong freq)
{
void __iomem *pll_gnrl_ctl, __iomem *pll_div_ctl;
u32 pll_div_ctl_val, pll_clke_masks;
int ret = board_imx_intpll_override(pll, &freq);
if (ret)
return ret;
switch (pll) {
case ANATOP_SYSTEM_PLL1:
arch/arm/mach-imx/mx6/Kconfig
+1
View File
@@ -393,6 +393,7 @@ config TARGET_MX6SLEVK
bool "mx6slevk"
depends on MX6SL
select SUPPORT_SPL
imply OF_UPSTREAM
config TARGET_MX6SLLEVK
bool "mx6sll evk"
board/phytec/phycore_imx8mp/phycore-imx8mp.c
+34
View File
@@ -10,10 +10,34 @@
#include <asm/mach-imx/boot_mode.h>
#include <env.h>
#include <init.h>
#include <fdt_support.h>
#include <jffs2/load_kernel.h>
#include <miiphy.h>
#include <mtd_node.h>
#include "../common/imx8m_som_detection.h"
DECLARE_GLOBAL_DATA_PTR;
#define EEPROM_ADDR 0x51
#define EEPROM_ADDR_FALLBACK 0x59
int ft_board_setup(void *blob, struct bd_info *bd)
{
u8 spi = phytec_get_imx8m_spi(NULL);
/* Do nothing if no SPI is populated */
if (!spi)
return 0;
static const struct node_info nodes[] = {
{ "jedec,spi-nor", MTD_DEV_TYPE_NOR, },
};
fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
return 0;
}
static int setup_fec(void)
{
struct iomuxc_gpr_base_regs *gpr =
@@ -27,6 +51,11 @@ static int setup_fec(void)
int board_init(void)
{
int ret = phytec_eeprom_data_setup_fallback(NULL, 0,
EEPROM_ADDR, EEPROM_ADDR_FALLBACK);
if (ret)
printf("%s: EEPROM data init failed\n", __func__);
setup_fec();
return 0;
@@ -39,6 +68,11 @@ int board_mmc_get_env_dev(int devno)
int board_late_init(void)
{
u8 spi = phytec_get_imx8m_spi(NULL);
if (spi != 0 && spi != PHYTEC_EEPROM_INVAL)
env_set("spiprobe", "sf probe");
switch (get_boot_device()) {
case SD2_BOOT:
env_set_ulong("mmcdev", 1);
board/phytec/phycore_imx8mp/phycore_imx8mp.env
+4
View File
@@ -7,6 +7,7 @@ bootcmd=
fi;
mmc dev ${mmcdev};
if mmc rescan; then
run spiprobe;
if test ${doraucboot} = 1; then
run raucinit;
fi;
@@ -27,6 +28,9 @@ fdt_addr_r=0x48000000
fdtfile=CONFIG_DEFAULT_FDT_FILE
image=Image
ip_dyn=yes
mtdparts=30bb0000.spi:3840k(u-boot),128k(env),128k(env_redund),-(none)
mtdids=nor0=30bb0000.spi
spiprobe=true
loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}
loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}
mmcargs=
configs/mx6slevk_defconfig
+5 -2
View File
@@ -9,7 +9,7 @@ CONFIG_ENV_OFFSET=0x80000
CONFIG_MX6SL=y
CONFIG_TARGET_MX6SLEVK=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
CONFIG_DEFAULT_DEVICE_TREE="nxp/imx/imx6sl-evk"
# CONFIG_CMD_BMODE is not set
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
@@ -38,7 +38,6 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
@@ -63,9 +62,13 @@ CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_SYSRESET_WATCHDOG_AUTO=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_IMX_WATCHDOG=y
configs/mx6slevk_spinor_defconfig
-71
View File
@@ -1,71 +0,0 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_MX6SL=y
CONFIG_TARGET_MX6SLEVK=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
# CONFIG_CMD_BMODE is not set
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPI_BOOT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
configs/mx6slevk_spl_defconfig
-88
View File
@@ -1,88 +0,0 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x80000
CONFIG_MX6SL=y
CONFIG_TARGET_MX6SLEVK=y
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
configs/phycore-imx8mp_defconfig
+24
View File
@@ -6,8 +6,10 @@ CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PHYTEC_SOM_DETECTION=y
CONFIG_SF_DEFAULT_SPEED=80000000
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3C0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-phyboard-pollux-rdk"
@@ -30,7 +32,9 @@ CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_DEFAULT_FDT_FILE="oftree"
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
@@ -50,7 +54,9 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
# CONFIG_SPL_CRYPTO is not set
CONFIG_SPL_I2C=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_FLASH_MTD=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
@@ -66,6 +72,8 @@ CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
@@ -79,10 +87,12 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=2
@@ -115,6 +125,17 @@ CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHYLIB=y
CONFIG_PHY_TI_DP83867=y
CONFIG_DM_ETH_PHY=y
@@ -136,6 +157,9 @@ CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPL_POWER_I2C=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_NXP_FSPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
configs/verdin-imx8mm_defconfig
+1
View File
@@ -29,6 +29,7 @@ CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_OF_SYSTEM_SETUP=y
configs/verdin-imx8mp_defconfig
+1
View File
@@ -38,6 +38,7 @@ CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_OF_SYSTEM_SETUP=y
drivers/gpio/mxc_gpio.c
+8 -2
View File
@@ -133,7 +133,10 @@ int gpio_get_value(unsigned gpio)
regs = (struct gpio_regs *)gpio_ports[port];
val = (readl(&regs->gpio_psr) >> gpio) & 0x01;
if ((readl(&regs->gpio_dir) >> gpio) & 0x01)
val = (readl(&regs->gpio_dr) >> gpio) & 0x01;
else
val = (readl(&regs->gpio_psr) >> gpio) & 0x01;
return val;
}
@@ -210,7 +213,10 @@ static void mxc_gpio_bank_set_value(struct gpio_regs *regs, int offset,
static int mxc_gpio_bank_get_value(struct gpio_regs *regs, int offset)
{
return (readl(&regs->gpio_psr) >> offset) & 0x01;
if ((readl(&regs->gpio_dir) >> offset) & 0x01)
return (readl(&regs->gpio_dr) >> offset) & 0x01;
else
return (readl(&regs->gpio_psr) >> offset) & 0x01;
}
/* set GPIO pin 'gpio' as an input */
drivers/misc/imx_ele/ele_api.c
+77
View File
@@ -1,11 +1,13 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2020, 2023 NXP
* Copyright 2024 Mathieu Othacehe <othacehe@gnu.org>
*
*/
#include <hang.h>
#include <malloc.h>
#include <memalign.h>
#include <asm/io.h>
#include <dm.h>
#include <asm/mach-imx/ele_api.h>
@@ -527,6 +529,81 @@ int ele_start_rng(void)
return ret;
}
int ele_derive_huk(u8 *key, size_t key_size, u8 *seed, size_t seed_size)
{
struct udevice *dev = gd->arch.ele_dev;
struct ele_msg msg;
int msg_size = sizeof(struct ele_msg);
u8 *seed_aligned, *key_aligned;
int ret, size;
if (!dev) {
printf("ele dev is not initialized\n");
return -ENODEV;
}
if (key_size != 16 && key_size != 32) {
printf("key size can only be 16 or 32\n");
return -EINVAL;
}
if (seed_size >= (1U << 16) - 1) {
printf("seed size is too large\n");
return -EINVAL;
}
seed_aligned = memalign(ARCH_DMA_MINALIGN, seed_size);
if (!seed_aligned) {
printf("failed to alloc memory\n");
return -EINVAL;
}
memcpy(seed_aligned, seed, seed_size);
key_aligned = memalign(ARCH_DMA_MINALIGN, key_size);
if (!key_aligned) {
printf("failed to alloc memory\n");
ret = -EINVAL;
goto ret_seed;
}
size = ALIGN(seed_size, ARCH_DMA_MINALIGN);
flush_dcache_range((ulong)seed_aligned,
(ulong)seed_aligned + size);
size = ALIGN(key_size, ARCH_DMA_MINALIGN);
invalidate_dcache_range((ulong)key_aligned,
(ulong)key_aligned + size);
msg.version = ELE_VERSION;
msg.tag = ELE_CMD_TAG;
msg.size = 7;
msg.command = ELE_CMD_DERIVE_KEY;
msg.data[0] = upper_32_bits((ulong)key_aligned);
msg.data[1] = lower_32_bits((ulong)key_aligned);
msg.data[2] = upper_32_bits((ulong)seed_aligned);
msg.data[3] = lower_32_bits((ulong)seed_aligned);
msg.data[4] = seed_size << 16 | key_size;
msg.data[5] = compute_crc(&msg);
ret = misc_call(dev, false, &msg, msg_size, &msg, msg_size);
if (ret) {
printf("Error: %s: ret %d, response 0x%x\n",
__func__, ret, msg.data[0]);
goto ret_key;
}
invalidate_dcache_range((ulong)key_aligned,
(ulong)key_aligned + size);
memcpy(key, key_aligned, key_size);
ret_key:
free(key_aligned);
ret_seed:
free(seed_aligned);
return ret;
}
int ele_commit(u16 fuse_id, u32 *response, u32 *info_type)
{
struct udevice *dev = gd->arch.ele_dev;
drivers/usb/host/ehci-mx5.c
+4
View File
@@ -79,6 +79,10 @@
/* USB_CTRL_1 */
#define MXC_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
#ifndef CFG_MXC_USB_PORTSC
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif
int mxc_set_usbcontrol(int port, unsigned int flags)
{
unsigned int v;
include/configs/apalis_imx6.h
-5
View File
@@ -23,11 +23,6 @@
/* Network */
/* USB Configs */
/* Host */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Framebuffer and LCD */
/* Command definition */
include/configs/aristainetos2.h
-4
View File
@@ -411,10 +411,6 @@
/* DMA stuff, needed for GPMI/MXS NAND support */
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* UBI support */
#define CFG_ENV_FLAGS_LIST_STATIC "ethaddr:mw,serial#:sw,board_type:sw," \
include/configs/brppt2.h
-3
View File
@@ -78,7 +78,4 @@ BUR_COMMON_ENV \
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __CONFIG_BRPP2_IMX6_H */
include/configs/cl-som-imx7.h
-4
View File
@@ -95,8 +95,4 @@
#define CFG_SYS_FSL_USDHC_NUM 2
#endif
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif /* __CONFIG_H */
include/configs/cm_fx6.h
-4
View File
@@ -134,10 +134,6 @@
/* Ethernet */
#define CFG_FEC_MXC_PHYADDR 0
/* USB */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Boot */
#define CFG_SYS_BOOTMAPSZ (8 << 20)
include/configs/colibri-imx6ull.h
-5
View File
@@ -117,11 +117,6 @@
#define CFG_SYS_NAND_BASE -1
#endif
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* USB Device Firmware Update support */
#define DFU_DEFAULT_POLL_TIMEOUT 300
include/configs/colibri_imx6.h
-5
View File
@@ -21,11 +21,6 @@
#define CFG_SYS_FSL_ESDHC_ADDR 0
#define CFG_SYS_FSL_USDHC_NUM 2
/* USB Configs */
/* Host */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Command definition */
#define BOOT_TARGET_DEVICES(func) \
include/configs/colibri_imx7.h
-5
View File
@@ -159,9 +159,4 @@
#define CFG_SYS_NAND_BASE 0x40000000
#endif
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
include/configs/dart_6ul.h
-4
View File
@@ -46,10 +46,6 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#define ENV_MMC \
"mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
"mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
include/configs/dh_imx6.h
-4
View File
@@ -30,10 +30,6 @@
/* UART */
#define CFG_MXC_UART_BASE UART1_BASE
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* USB Gadget (DFU, UMS) */
#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
#define DFU_DEFAULT_POLL_TIMEOUT 300
include/configs/display5.h
-1
View File
@@ -287,5 +287,4 @@
/* The 0x120000 value corresponds to above SPI-NOR memory MAP */
#endif
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __CONFIG_H */
include/configs/embestmx6boards.h
-4
View File
@@ -17,10 +17,6 @@
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR 0
include/configs/ge_b1x5v2.h
-4
View File
@@ -23,10 +23,6 @@
#define CONSOLE_DEVICE "ttymxc2" /* Base board debug connector */
#endif
/* USB */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Memory */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
include/configs/gw_ventana.h
-4
View File
@@ -18,10 +18,6 @@
#define CFG_POWER_PFUZE100_I2C_ADDR 0x08
#define CFG_POWER_LTC3676_I2C_ADDR 0x3c
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CFG_SYS_SDRAM_BASE PHYS_SDRAM
include/configs/imx6_logic.h
-6
View File
@@ -114,12 +114,6 @@
#define CFG_SYS_NAND_BASE 0x40000000
#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
/* Falcon Mode */
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
include/configs/imx6dl-mamoj.h
-4
View File
@@ -42,10 +42,6 @@
/* Ethernet */
#define CFG_FEC_MXC_PHYADDR 1
/* USB */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Falcon */
/* MMC support: args@1MB kernel@2MB */
include/configs/imx6q-bosch-acc.h
-2
View File
@@ -110,7 +110,5 @@
#endif
#endif
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif /* __IMX6Q_ACC_H */
include/configs/imx7-cm.h
-3
View File
@@ -77,7 +77,4 @@
#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
#define CFG_SYS_FSL_USDHC_NUM 2
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __CONFIG_H */
include/configs/imx8mm-cl-iot-gate.h
-3
View File
@@ -137,7 +137,4 @@
#define CFG_FEC_MXC_PHYADDR -1 /* Auto search of PHY on MII */
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /*__IMX8MM_CL_IOT_GATE_H*/
include/configs/kontron-sl-mx6ul.h
-5
View File
@@ -24,11 +24,6 @@
/* Board and environment settings */
#define CFG_MXC_UART_BASE UART4_BASE
#ifdef CONFIG_USB_EHCI_HCD
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
/* Boot order for distro boot */
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
include/configs/kontron-sl-mx8mm.h
-5
View File
@@ -24,11 +24,6 @@
/* Board and environment settings */
#ifdef CONFIG_USB_EHCI_HCD
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
/* GUID for capsule updatable firmware image */
#define KONTRON_SL_MX8MM_FIT_IMAGE_GUID \
EFI_GUID(0xd488e45a, 0x4929, 0x4b55, 0x8c, 0x14, \
include/configs/kp_imx53.h
-1
View File
@@ -11,7 +11,6 @@
#include <linux/sizes.h>
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Command definition */
include/configs/kp_imx6q_tpc.h
-6
View File
@@ -16,12 +16,6 @@
/* FEC ethernet */
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200\0" \
"fdt_addr=0x18000000\0" \
include/configs/liteboard.h
-6
View File
@@ -93,12 +93,6 @@
/* FLASH and environment organization */
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
#ifdef CONFIG_CMD_NET
#define CFG_FEC_ENET_DEV 0
include/configs/m53menlo.h
-2
View File
@@ -68,8 +68,6 @@
* USB
*/
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORT 1
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
include/configs/meerkat96.h
-3
View File
@@ -23,7 +23,4 @@
/* Environment configs */
/* USB configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif
include/configs/mx51evk.h
-1
View File
@@ -33,7 +33,6 @@
#define CFG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
/* USB Configs */
#define CFG_MXC_USB_PORT 1
#define CFG_MXC_USB_PORTSC PORT_PTS_ULPI
#define CFG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
include/configs/mx53cx9020.h
-2
View File
@@ -22,8 +22,6 @@
/* bootz: zImage/initrd.img support */
/* USB Configs */
#define CFG_MXC_USB_PORT 1
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Command definition */
include/configs/mx53loco.h
-2
View File
@@ -17,8 +17,6 @@
#define CFG_SYS_FSL_ESDHC_ADDR 0
/* USB Configs */
#define CFG_MXC_USB_PORT 1
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* PMIC Controller */
include/configs/mx53ppd.h
-2
View File
@@ -12,8 +12,6 @@
#include <asm/arch/imx-regs.h>
/* USB Configs */
#define CFG_MXC_USB_PORT 1
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Command definition */
include/configs/mx6cuboxi.h
-3
View File
@@ -14,9 +14,6 @@
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
/* USB */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
/* Command definition */
#define CFG_MXC_UART_BASE UART1_BASE
include/configs/mx6memcal.h
-1
View File
@@ -31,6 +31,5 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
#define CFG_MXC_USB_PORTSC PORT_PTS_UTMI
#endif /* __CONFIG_H */
include/configs/mx6sabreauto.h
-4
View File
@@ -11,10 +11,6 @@
#define CFG_MXC_UART_BASE UART4_BASE
#define CONSOLE_DEV "ttymxc3"
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#define CFG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} }
#include "mx6sabre_common.h"
include/configs/mx6sabresd.h
-6
View File
@@ -24,10 +24,4 @@
#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
#endif
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
#endif /* __MX6SABRESD_CONFIG_H */
include/configs/mx6slevk.h
+2 -8
View File
@@ -25,9 +25,9 @@
"fdt_addr=0x88000000\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=1\0" \
"mmcdev=0\0" \
"mmcpart=1\0" \
"finduuid=part uuid mmc 1:2 uuid\0" \
"finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=PARTUUID=${uuid} rootwait rw\0" \
"loadbootscript=" \
@@ -88,12 +88,6 @@
/* Environment organization */
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
#define CFG_SYS_FSL_USDHC_NUM 3
#endif /* __CONFIG_H */
include/configs/mx6sllevk.h
-5
View File
@@ -92,10 +92,5 @@
#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
#define CFG_SYS_FSL_USDHC_NUM 3
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif
#include <linux/stringify.h>
#endif /* __CONFIG_H */
include/configs/mx6sxsabreauto.h
-5
View File
@@ -95,11 +95,6 @@
#define IMX_FEC_BASE ENET2_BASE_ADDR
#define CFG_FEC_MXC_PHYADDR 0x0
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
#define CFG_SYS_FSL_USDHC_NUM 2
#endif /* __CONFIG_H */
include/configs/mx6sxsabresd.h
-5
View File
@@ -117,11 +117,6 @@
#define CFG_FEC_MXC_PHYADDR 0x1
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
#ifdef CONFIG_CMD_PCI
#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
include/configs/mx6ul_14x14_evk.h
-6
View File
@@ -114,12 +114,6 @@
/* environment organization */
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
#ifdef CONFIG_CMD_NET
#define CFG_FEC_ENET_DEV 1
include/configs/mx7dsabresd.h
-3
View File
@@ -98,7 +98,4 @@
/* DMA stuff, needed for GPMI/MXS NAND support */
#endif
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __CONFIG_H */
include/configs/mx7ulp_com.h
-1
View File
@@ -51,5 +51,4 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE SZ_256K
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __CONFIG_H */
include/configs/mys_6ulx.h
-4
View File
@@ -29,10 +29,6 @@
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200n8\0" \
"fdt_addr_r=0x82000000\0" \
include/configs/nitrogen6x.h
-4
View File
@@ -18,10 +18,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CFG_FEC_MXC_PHYADDR 6
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#ifdef CONFIG_CMD_MMC
#define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
#else
include/configs/novena.h
-6
View File
@@ -51,12 +51,6 @@
/* UART */
#define CFG_MXC_UART_BASE UART2_BASE
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
/* Extra U-Boot environment. */
#define CFG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffff\0" \
include/configs/npi_imx6ull.h
-4
View File
@@ -28,10 +28,6 @@
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#ifdef CONFIG_CMD_NET
#define CFG_FEC_MXC_PHYADDR 0x1
#endif
include/configs/o4-imx6ull-nano.h
-4
View File
@@ -11,10 +11,6 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
#if IS_ENABLED(CONFIG_CMD_USB)
# define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* CONFIG_CMD_USB */
#define CFG_EXTRA_ENV_SETTINGS \
"mmcdev=0\0" \
"mmcpart=2\0" \
include/configs/opos6uldev.h
-6
View File
@@ -17,12 +17,6 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
/* USB */
#ifdef CONFIG_USB_EHCI_MX6
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
/* LCD */
#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
include/configs/pcl063.h
-4
View File
@@ -41,10 +41,6 @@
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200n8\0" \
"fdt_addr_r=0x82000000\0" \
include/configs/pcl063_ull.h
-4
View File
@@ -43,10 +43,6 @@
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#define ENV_MMC \
"mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
"mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
include/configs/pico-imx6.h
-4
View File
@@ -15,10 +15,6 @@
/* MMC Configuration */
#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CFG_DFU_ENV_SETTINGS \
include/configs/pico-imx6ul.h
-4
View File
@@ -21,10 +21,6 @@
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CFG_DFU_ENV_SETTINGS \
include/configs/pico-imx7d.h
-4
View File
@@ -105,8 +105,4 @@
#define CFG_SYS_FSL_USDHC_NUM 2
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
include/configs/somlabs_visionsom_6ull.h
-6
View File
@@ -59,12 +59,6 @@
/* environment organization */
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
#ifdef CONFIG_CMD_NET
#define CFG_FEC_MXC_PHYADDR 0x1
#endif
include/configs/tbs2910.h
-5
View File
@@ -25,11 +25,6 @@
#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
#endif
/* USB */
#ifdef CONFIG_CMD_USB
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* CONFIG_CMD_USB */
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
"bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
include/configs/tqma6.h
-3
View File
@@ -34,9 +34,6 @@
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR 0
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#if defined(CONFIG_TQMA6X_MMC_BOOT)
#define TQMA6_UBOOT_OFFSET SZ_1K
include/configs/usbarmory.h
-2
View File
@@ -23,8 +23,6 @@
#define CFG_SYS_FSL_ESDHC_ADDR 0
/* USB */
#define CFG_MXC_USB_PORT 1
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Linux boot */
include/configs/verdin-imx8mm.h
-3
View File
@@ -63,7 +63,4 @@
#define PHYS_SDRAM_2 0x100000000
#define PHYS_SDRAM_2_SIZE (long)(SZ_1G)
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __VERDIN_IMX8MM_H */
include/configs/vining_2000.h
-2
View File
@@ -36,8 +36,6 @@
/* Network */
#define CFG_FEC_MXC_PHYADDR 0x0
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#ifdef CONFIG_CMD_PCI
#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6)
include/configs/wandboard.h
-4
View File
@@ -16,10 +16,6 @@
#define CFG_SYS_FSL_USDHC_NUM 2
#define CFG_SYS_FSL_ESDHC_ADDR 0
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0\0" \
"splashpos=m,m\0" \
include/configs/warp7.h
-1
View File
@@ -92,7 +92,6 @@
#define CFG_SYS_FSL_USDHC_NUM 1
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
/* USB Device Firmware Update support */
#define DFU_DEFAULT_POLL_TIMEOUT 300
include/configs/xpress.h
-4
View File
@@ -27,10 +27,6 @@
/* Environment is in stored in the eMMC boot partition */
/* USB Configs */
#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#define CFG_FEC_ENET_DEV 0
#define CFG_FEC_MXC_PHYADDR 0x0