imx9{4, 5, 52}_evk: power on mcore according to SM config

When working with SM config mx9{4,5,52}evkrpmsg, mcores are not booted
by ROM. Hence, power on the mcore and initialize TCM ECC in u-boot for
subsequent mcore booting.

Signed-off-by: Ye Li <ye.li@nxp.com>
[fabio: Adapted to mainline context]
Signed-off-by: Fabio Estevam <festevam@gmail.com>

arch/arm/include/asm/arch-imx9/sys_proto.h

@@ -28,6 +28,8 @@ int scmi_get_boot_device_offset(unsigned long *img_off);
 int scmi_get_boot_stage(u8 *stage);
 u8 scmi_get_imgset_sel(void);
 
+int power_on_mcore(const char *sm_cfgname);
+
 #define is_voltage_mode(mode) (soc_target_voltage_mode() == (mode))
 
 #endif

arch/arm/mach-imx/imx9/scmi/soc.c

@@ -58,6 +58,43 @@ uint32_t scmi_get_rom_data(rom_passover_t *rom_data)
 	return 0;
 }
 
+int scmi_misc_cfginfo(u32 *msel, char *cfgname)
+{
+	struct scmi_imx_misc_cfg_info_out out = {};
+	struct scmi_msg msg = {
+		.protocol_id = SCMI_PROTOCOL_ID_IMX_MISC,
+		.message_id = SCMI_IMX_MISC_CFG_INFO,
+		.in_msg = (u8 *)NULL,
+		.in_msg_sz = 0,
+		.out_msg = (u8 *)&out,
+		.out_msg_sz = sizeof(out),
+	};
+	int ret;
+	struct udevice *dev;
+
+	if (!msel || !cfgname)
+		return -EINVAL;
+
+	ret = uclass_get_device_by_name(UCLASS_CLK, "protocol@14", &dev);
+	if (ret)
+		return ret;
+
+	ret = devm_scmi_process_msg(dev, &msg);
+	if (ret)
+		return ret;
+
+	if (out.status) {
+		printf("Failed to get cfg name, scmi_err = %d\n",
+		       out.status);
+		return scmi_to_linux_errno(out.status);
+	}
+
+	*msel = out.msel;
+	strcpy(cfgname, (const char *)out.cfgname);
+
+	return 0;
+}
+
 int scmi_misc_ddrinfo(u32 ddrc_id, struct scmi_ddr_info_out *out)
 {
 	u32 in = ddrc_id;
@@ -860,6 +897,67 @@ const char *get_cpu_variant_type_name(u32 type)
 	return NULL;
 }
 
+int power_on_mcore(const char *sm_cfgname)
+{
+	char cfgname[MISC_MAX_CFGNAME];
+	u32 msel;
+	int ret;
+	struct udevice *dev;
+
+	ret = scmi_misc_cfginfo(&msel, cfgname);
+	if (ret)
+		return ret;
+
+	if (strncmp(cfgname, sm_cfgname, MISC_MAX_CFGNAME))
+		return -EINVAL;
+
+	printf("power on mcore for %s\n", sm_cfgname);
+
+	ret = uclass_get_device_by_name(UCLASS_CLK, "protocol@14", &dev);
+	if (ret)
+		return ret;
+
+	if (!arch_auxiliary_core_check_up(1)) {
+		/* Power up M7MIX */
+		ret = scmi_pwd_state_set(dev, 0, SCMI_PD(M70), 0);
+		if (ret) {
+			printf("Power M7 failed\n");
+			return -EIO;
+		}
+
+		/* In case OEI not init ECC, do it here */
+		memset_io((void *)0x203c0000, 0, 0x40000);
+		memset_io((void *)0x20400000, 0, 0x40000);
+	}
+
+#if IS_ENABLED(CONFIG_IMX94)
+	if (!arch_auxiliary_core_check_up(7)) {
+		ret = scmi_pwd_state_set(dev, 0, SCMI_PD(M71), 0);
+		if (ret) {
+			printf("Power M71 failed\n");
+			return -EIO;
+		}
+
+		memset_io((void *)0x202c0000, 0, 0x40000);
+		memset_io((void *)0x20300000, 0, 0x40000);
+	}
+
+	if (!arch_auxiliary_core_check_up(8)) {
+		ret = scmi_pwd_state_set(dev, 0, SCMI_PD(NETC), 0);
+		if (ret) {
+			printf("Power M33S failed\n");
+			return -EIO;
+		}
+
+		memset_io((void *)0x209c0000, 0, 0x40000);
+		memset_io((void *)0x20A00000, 0, 0x40000);
+		memset_io((void *)0x20800000, 0, 0xa1000);
+	}
+#endif
+
+	return 0;
+}
+
 void build_info(void)
 {
 	u32 fw_version, sha1, res = 0, status;

board/nxp/imx94_evk/imx94_evk.c

@@ -11,6 +11,9 @@
 
 int board_init(void)
 {
+	/* Power on mcores when using rpmsg cfg */
+	power_on_mcore("mx94evkrpmsg");
+
 	return 0;
 }
 

board/nxp/imx952_evk/imx952_evk.c

@@ -9,6 +9,9 @@
 
 int board_init(void)
 {
+	/* Power on mcores when using rpmsg cfg */
+	power_on_mcore("mx952evkrpmsg");
+
 	return 0;
 }
 

board/nxp/imx95_evk/imx95_evk.c

@@ -7,6 +7,14 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 
+int board_init(void)
+{
+	/* Power on mcores when using rpmsg cfg */
+	power_on_mcore("mx95evkrpmsg");
+
+	return 0;
+}
+
 int board_late_init(void)
 {
 	if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC))

configs/imx95_evk.config

@@ -37,7 +37,7 @@ CONFIG_BOOTCOMMAND="bootflow scan -l; run bsp_bootcmd"
 CONFIG_DEFAULT_FDT_FILE="imx95-19x19-evk.dtb"
 CONFIG_SYS_CBSIZE=2048
 CONFIG_SYS_PBSIZE=2074
-# CONFIG_BOARD_INIT is not set
+CONFIG_BOARD_INIT=y
 CONFIG_BOARD_LATE_INIT=y
 CONFIG_PCI_INIT_R=y
 CONFIG_SPL_MAX_SIZE=0x20000

include/scmi_nxp_protocols.h

@@ -18,6 +18,7 @@
 #define SCMI_ARRAY(X, Y)	((SCMI_PAYLOAD_LEN - (X)) / sizeof(Y))
 
 #define SCMI_IMX_MISC_RESET_REASON	0xA
+#define SCMI_IMX_MISC_CFG_INFO		0xC
 
 struct scmi_imx_misc_reset_reason_in {
 #define MISC_REASON_FLAG_SYSTEM		BIT(0)
@@ -119,4 +120,14 @@ static inline int scmi_imx_cpu_start(struct udevice *dev, u32 cpuid, bool start)
 	return -EOPNOTSUPP;
 }
 #endif
+
+struct scmi_imx_misc_cfg_info_out {
+	s32 status;
+	/* Mode selector value */
+	u32 msel;
+#define MISC_MAX_CFGNAME	16
+	/* Config (cfg) file basename */
+	char cfgname[MISC_MAX_CFGNAME];
+};
+
 #endif