diff --git a/src/cpu/rv32cpu.c b/src/cpu/rv32cpu.c index d4fbede..1028e6a 100644 --- a/src/cpu/rv32cpu.c +++ b/src/cpu/rv32cpu.c @@ -5,6 +5,7 @@ #include "memory/memory.h" #include "vriscv.h" +#include "exception.h" #include #include @@ -515,10 +516,8 @@ static void cpu_execute(rv32_cpu_t* cpu, instruction_t* instruction) sbi_call(cpu, cpu->regs.a7, cpu->regs.a6); break; case IMM_EBREAK: - // EBREAK : on debug, give back hand to debugger ; without debug, end simulation - // In any way, we set back simulation ticks to 0 - cpu->sim_ticks_left = 1; - cpu->pc -= 4; + // EBREAK : generate a breakpoint exception + exception_trigger(cpu, SCAUSE_BREAKPOINT); break; case IMM_SRET: fprintf(stderr, "SRET: We don't support that.\n");