Ilias ApalodimasandTom Rini
1174c99ab4
Currently, the bi_dram[] information is stored in the board info structure (bd). Because bd is only valid after reserve_board(), dram_init_banksize() must be called late in the initialization process. This limitation is problematic, as it forces us to rely on a variety of bespoke functions to determine board RAM, bank memory sizes, and other early setup requirements. By moving bi_dram[] into the global data (gd), we can run it earlier. This is particularly convenient since boards define their own dram_init_banksize() routines, which do not always rely on parsing Device Tree (DT) memory nodes. Additionally, U-Boot defaults to relocating to the top of the first memory bank. While boards currently use custom functions to override this behavior, having the DRAM bank information available earlier in gd makes relocating to a different bank trivial and standardizes the process. Reviewed-by: Anshul Dalal <anshuld@ti.com> Tested-by: Michal Simek <michal.simek@amd.com> # Versal Gen 2 Vek385 Tested-by: Anshul Dalal <anshuld@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Tested-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
105 lines
2.5 KiB
C
105 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* (C) Copyright 2010,2011
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* Graeme Russ, <graeme.russ@gmail.com>
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*/
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#include <init.h>
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#include <asm/e820.h>
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#include <asm/cb_sysinfo.h>
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#include <asm/global_data.h>
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DECLARE_GLOBAL_DATA_PTR;
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unsigned int install_e820_map(unsigned int max_entries,
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struct e820_entry *entries)
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{
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return cb_install_e820_map(max_entries, entries);
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}
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/*
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* This function looks for the highest region of memory lower than 4GB which
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* has enough space for U-Boot where U-Boot is aligned on a page boundary. It
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* overrides the default implementation found elsewhere which simply picks the
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* end of ram, wherever that may be. The location of the stack, the relocation
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* address, and how far U-Boot is moved by relocation are set in the global
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* data structure.
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*/
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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uintptr_t dest_addr = 0;
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int i;
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for (i = 0; i < lib_sysinfo.n_memranges; i++) {
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struct memrange *memrange = &lib_sysinfo.memrange[i];
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/* Force U-Boot to relocate to a page aligned address. */
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uint64_t start = roundup(memrange->base, 1 << 12);
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uint64_t end = memrange->base + memrange->size;
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/* Ignore non-memory regions. */
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if (memrange->type != CB_MEM_RAM)
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continue;
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/* Filter memory over 4GB. */
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if (start > 0xffffffffULL)
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continue;
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if (end > 0xffffffffULL)
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end = 0x100000000ULL;
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/* Skip this region if it's too small. */
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if (end - start < total_size)
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continue;
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/* Use this address if it's the largest so far. */
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if (end > dest_addr)
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dest_addr = end;
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}
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/* If no suitable area was found, return an error. */
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if (!dest_addr)
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panic("No available memory found for relocation");
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return (ulong)dest_addr;
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}
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int dram_init(void)
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{
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int i;
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phys_size_t ram_size = 0;
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for (i = 0; i < lib_sysinfo.n_memranges; i++) {
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struct memrange *memrange = &lib_sysinfo.memrange[i];
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unsigned long long end = memrange->base + memrange->size;
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if (memrange->type == CB_MEM_RAM && end > ram_size)
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ram_size += memrange->size;
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}
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gd->ram_size = ram_size;
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if (ram_size == 0)
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return -1;
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return 0;
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}
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int dram_init_banksize(void)
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{
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int i, j;
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if (CONFIG_NR_DRAM_BANKS) {
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for (i = 0, j = 0; i < lib_sysinfo.n_memranges; i++) {
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struct memrange *memrange = &lib_sysinfo.memrange[i];
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if (memrange->type == CB_MEM_RAM) {
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gd->dram[j].start = memrange->base;
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gd->dram[j].size = memrange->size;
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j++;
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if (j >= CONFIG_NR_DRAM_BANKS)
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break;
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}
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}
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}
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return 0;
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}
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