Yao ZiandLeo Yu-Chi Liang
a23c1b3fc0
Setup core information and bring secondary HARTs up for a functional multi-core system. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
52 lines
945 B
C
52 lines
945 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2025, Yao Zi <ziyao@disroot.org>
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*/
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#include <asm/io.h>
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#include <asm/spl.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/spl.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <hang.h>
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#include <spl.h>
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u32 spl_boot_device(void)
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{
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/*
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* We don't bother to load proper U-Boot from an external device as
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* it fits in the integrated SRAM nicely.
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*/
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return BOOT_DEVICE_RAM;
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}
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void board_init_f(ulong dummy)
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{
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int ret = spl_early_init();
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struct udevice *dev;
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if (ret)
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panic("spl_early_init() failed %d\n", ret);
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preloader_console_init();
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/*
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* Manually bind CPU ahead of time to make sure in-core timers are
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* available in SPL.
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*/
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ret = uclass_get_device(UCLASS_CPU, 0, &dev);
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if (ret)
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panic("failed to bind CPU: %d\n", ret);
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riscv_cpu_setup();
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th1520_kick_secondary_cores();
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spl_dram_init();
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icache_enable();
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dcache_enable();
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th1520_invalidate_pmp();
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}
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