Commit Graph
101042 Commits
Author SHA1 Message Date
Simon GlassandHeinrich Schuchardt 2ea9579523 efi: Rename the lib/efi directory
This directory was created when U-Boot gained the ability to run as an
EFI app in 2015. Since then the EFI-loader feature has been added.

The code in lib/efi is not actually used by the loader, so the name is
confusing.

Rename the directory to efi_client to indicate that it includes files
just for U-Boot being a client of EFI, i.e. the EFI app and stub.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-07-26 07:29:31 +02:00
Tom Rini 1d782a3f22 Docker, CI: Update to latest Ubuntu and Dockerfile
- Update to Ubuntu "Jammy" 20250714 tag
- Update to current Dockerfile which brings us QEMU 10.0.2 and newer
  coreboot and pulls in lz4 via the non-legacy package name.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-25 13:03:01 -06:00
Tom Rini 2a19fc236f Merge patch series "CI: Disable sifive_unleashed_sdcard QEMU testing"
This series from myself brings CI up to using QEMU 10.0.2 for platforms.
We need to disable one test for now while a report to upstream QEMU is
resolved and also need to now update coreboot in order to be able to
build a version of it non-interactively (source locations have changed).

Link: https://lore.kernel.org/r/20250716001539.2483390-1-trini@konsulko.com
2025-07-25 10:55:45 -06:00
Tom Rini 0fabedfcde CI: Update to coreboot 25.03
At this point there's problems rebuilding coreboot-24.08 without manual
intervention. Let us upgrade to a newer version.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-25 10:55:40 -06:00
Tom Rini 910aa6c1ef Dockerfile: Update to QEMU 10.0.2
As QEMU 10.0.2 is the current release, update to that so that we can
update other features within CI.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-25 10:55:40 -06:00
Tom Rini 4f8755fe08 CI: Disable sifive_unleashed_sdcard QEMU testing
Changes in upstream QEMU have lead to this specific configuration of the
sifive_unleashed platform not working in QEMU. Until this can be
root caused and resolved, disable this test for now.

Link: https://gitlab.com/qemu-project/qemu/-/issues/2945
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-25 10:55:40 -06:00
Tom Rini 088d24eb96 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-samsung
- Enhanced e850-96 support
2025-07-25 07:50:44 -06:00
Ryan WannerandEugen Hristev ecbe341012 configs: sama7d65_curiosity: Add defconfig for sama7d65_curiosity
Add initial mmc defconfig to boot from SDMMC1.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Signed-off-by: Romain Sioen <Romain.Sioen@microchip.com>
2025-07-25 11:54:43 +03:00
Ryan WannerandEugen Hristev 9e40ad0f81 board: sama7d65_curiosity: Add support for sama7d65_curiosity
Add board specific functions for sama7d65_curiosity.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
2025-07-25 11:54:43 +03:00
Ryan WannerandEugen Hristev 0c29ddfe0c ARM: dts: at91: sama7d65-curiosity: Add DT tweaks for sama7d65-curiosity board
Add u-boot device tree and tweaks for sama7d65-curiosity board on top of
the upstream DTS files in dts/upstream.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
[varshini.rajendran@microchip.com: align with Linux DT and add tweaks]
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
2025-07-25 11:54:43 +03:00
Ryan WannerandEugen Hristev 1fd6fcf95a ARM: mach-at91: add support for new SoC sama7d65
Add support for new SoC sama7d65.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
2025-07-25 11:54:43 +03:00
Ryan WannerandEugen Hristev 8dff5dd290 clk: at91: sama7d65: add clock support
Add clock support for SAMA7D65

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
[romain.sioen@microchip.com: add Fractional PLL core
output range]
Signed-off-by: Romain Sioen <romain.sioen@microchip.com>
[varshini.rajendran@microchip.com: adapt driver to upstream]
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
2025-07-25 11:54:43 +03:00
Ryan WannerandEugen Hristev eff0e49d1c clk: at91: Update MAX PLL and master clk ID
Update the MAX PLL and master CLK ID to support sama7d65
SoC family.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
2025-07-25 11:54:43 +03:00
Sam ProtsenkoandMinkyu Kang f83f2397a1 doc: samsung: Describe flashing process for E850-96
Now that USB is enabled on the E850-96 board, DFU and fastboot tools are
functional and can be used to flash images to eMMC. Update the E850-96
documentation accordingly and describe flashing to User Data Area and
Boot HW Partition of eMMC using fastboot and DFU tools.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2025-07-25 10:17:21 +09:00
Sam ProtsenkoandMinkyu Kang fd76fdc34e board: samsung: e850-96: Enable EFI Capsule Update mechanism
Make it possible to update E850-96 firmware binaries using EFI Capsule
Update mechanism. For example, to update the U-Boot binary, the capsule
file can be generated like this:

    $ ./tools/mkeficapsule --index 4 \
      --guid 629578c3-ffb3-4a89-ac0c-611840727779 \
      u-boot.bin capsule4.bin

The resulting 'capsule4.bin' should be copied to ESP partition (in
/boot/efi/EFI/UpdateCapsule/ directory). Then after reboot U-Boot will
update the 'bootloader' area in eMMC Boot Partition A (boot0) and remove
the capsule file, by EFI boot manager executed as a part of Standard
Boot:

    Applying capsule capsule4.bin succeeded.
    Reboot after firmware update.

The kernel will also expose the ESRT table information via SysFS in
/sys/firmware/efi/esrt/entries.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2025-07-25 10:17:21 +09:00
Sam ProtsenkoandMinkyu Kang 9472bc2b50 configs: e850-96: Enable USB gadget and fastboot
Now that USB phy and dwc3 glue layer was added for Exynos850, USB gadget
is functional on E850-96 board. Enable next features to make it useful:

  - Exynos850 USB PHY driver (needed for all USB functions)
  - dwc3 generic driver
  - USB gadget
  - CONFIG_DM_USB_GADGET: needed for DWC3 glue layer to instantiate the
    peripheral driver, i.e. dwc3_generic_peripheral_probe()
  - USB VID and PID
  - DFU
  - Fastboot (including flashing to eMMC boot partitions)

As all Exynos firmware binaries (including U-Boot) are contained in eMMC
boot partition A (mmc0boot0), because that's where Boot ROM code jumps,
it might be useful to be able to flash that area with fastboot. Other
more fine grained choices for updating the firmware would be DFU and EFI
Capsule Update mechanism.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2025-07-25 10:17:21 +09:00
Sam ProtsenkoandMinkyu Kang fcb53c5a69 configs: e850-96: Increase malloc() pool size
"fastboot flash" tries to malloc 8 MiB buffer after receiving data over
USB and trying to write it to eMMC. Right now only 8.12 MiB malloc is
available for E850-96 overall, which leads to this issue:

    Malloc failed for: CHUNK_TYPE_RAW

Fix it by increasing malloc pool size from 8.12 MiB up to 32 MiB, like
it's done in many other boards using fastboot.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2025-07-25 10:17:21 +09:00
Sam ProtsenkoandMinkyu Kang d15a7b0459 board: samsung: e850-96: Add Android partitions
Matches downstream Android-Q partition table created by flashing the
modified gpt.img [1], with added ESP partition (EFI System Partition).
It's an A/B slotted Android partition table, so it's possible to boot
Android from this table using Android GBL EFI app. Tested using
AOSP/main images for E850-96 with booting via GBL app.

[1] https://gitlab.com/Linaro/96boards/e850-96/tools/gpt/-/blob/master/gpt_layout_uboot_q_ab

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2025-07-25 10:17:21 +09:00
Sam ProtsenkoandMinkyu Kang c0a8b48b71 board: samsung: e850-96: Add dfu_alt_info
Add 'dfu_alt_info' environment variable which contains:
  - Linux eMMC partitions ('esp' and 'rootfs')
  - eMMC Boot Partition A layout, where all the firmware reside

It makes it possible to update the bootloader (U-Boot). All sizes in
'dfu_alt_info' are given in 512B blocks (LBA). eMMC size is 58.2 GiB.
The eMMC Boot Partition A (mmc0boot0) layout looks like this:

                 boot0 partition (4 MiB)
       0x0 +----------------------------------+
           |         fwbl1 (12 KiB)           |
      0x18 +----------------------------------+
           |         epbl (76 KiB)            |
      0xb0 +----------------------------------+
           |         bl2 (256 KiB)            |
     0x2b0 +----------------------------------+
           |         dram_train (16 KiB)      |
     0x2d0 +----------------------------------+
           |         ect_test (50 KiB)        |
     0x334 +----------------------------------+
           |         acpm_test (130 KiB)      |
     0x438 +----------------------------------+
           |         bootloader (2 MiB)       |
    0x1438 +----------------------------------+
           |         el3_mon (256 KiB)        |
    0x1638 +----------------------------------+

where U-Boot should be flashed into 'bootloader' partition. So U-Boot
binary size should be 2 MiB or less. The whole boot0 partition is 4 MiB,
but only 2.8 MiB is currently used.

With this change, the U-Boot binary can be updated on eMMC like this:

    => dfu 0 mmc 0
    $ dfu-util -D u-boot.bin -a bootloader

Looking at E850-96 booting diagram at [1,2], it's easy to see how these
binaries are being executed in the same order they are placed in
mmc0boot0 area. E.g. fwbl1 is definitely BL1 (software part of Boot
ROM). So it's obvious the ROM code just reads the binary from eMMC at
0x0 offset into RAM (SRAM?) and executes it.

All mentioned images can be found at [3], as stated in E850-96 U-Boot
documentation. 'dram_train', 'ect_test' and 'acpm_test' areas should be
ignored -- they are not flashed with real images.

[1] doc/board/samsung/e850-96.rst
[2] https://docs.u-boot.org/en/latest/board/samsung/e850-96.html
[3] https://gitlab.com/Linaro/96boards/e850-96/images/-/tree/master/images

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2025-07-25 10:17:21 +09:00
Sam ProtsenkoandMinkyu Kang 34a6f585f0 board: samsung: e850-96: Setup serial# env var
Setup "serial#" environment variable from the chip ID. The chip ID is
read from Exynos850 SoC OTP (One Time Programmable) memory, which acts
like an EEPROM and contains unique SoC ID. This "serial#" variable is
further used for "fastboot devices" serial number, etc.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2025-07-25 10:17:21 +09:00
Sam ProtsenkoandMinkyu Kang ba713dd7d4 usb: dwc3-generic: Add Exynos850 support
The only thing needed from DWC3 glue layer for Exynos850 is to enable
USB clocks. The generic glue layer driver already does that. Add
Exynos850 dwc3 compatible string to enable support for this chip.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2025-07-25 10:17:21 +09:00
Sam ProtsenkoandMinkyu Kang 80c1606d13 phy: samsung: Add Exynos USB DRD PHY driver
Add DM driver for Exynos USB PHY controllers. For now it only supports
Exynos850 SoC. Only UTMI+ (USB 2.0) PHY interface is implemented, as
Exynos850 doesn't support USB 3.0. Only two clocks are used for this
controller:
  - phy: bus clock, used for PHY registers access
  - ref: PHY reference clock (OSCCLK)

Ported from Linux kernel: drivers/phy/samsung/phy-exynos5-usbdrd.c

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2025-07-25 10:17:21 +09:00
Tom Rini 021783860f Merge tag 'u-boot-imx-master-20250724' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27149

- Add support for the NXP imx93 frdm board.
- imx93_evk and phycore-imx93 cleanups.
- Convert imx6dl-sielaff to OF_UPSTREAM and fix serial download mode boot.
- Fix crash in imx power-domain.
- Migrate Phytec imx8mm boards to standard boot.
- Fix smatch warnings.
2025-07-24 15:31:17 -06:00
Tom Rini 896f570d56 Merge patch series "Add support for K3 BIST"
Neha Malcom Francis <n-francis@ti.com> says:

This series implements a driver for the BIST (Built-In Self Test) module
for K3 devices. The BIST driver must ideally support triggering of BIST
tests, both PBIST (Memory BIST) and LBIST (Logic BIST) on a core. Both
tests are destructive in nature. Please see links [1] and [2] for
further information regarding the two.

At boot up, BIST is executed by hardware for the MCU domain
automatically as part of HW POST. So BIST has been checked only for the
MCU domain when U-Boot comes up in the usual U-Boot to Linux boot flow.
To facilitate the use-case where some safe firmware is intended to be
run on a safe core, it is best to have triggered the BIST tests on that
core. As an example, we take triggering the BIST tests on the MAIN R52_x
cores. The triggering patch is kept as DONOTMERGE.

The general procedure for triggering BIST on a core is:
	1. Power on the core under test following a sequence
	2. Trigger the BIST test
	3. Reset the core under test following a sequence

BIST tests are triggered from A72 SPL where the DM (Device Manager
firmware that handles power management) is already up and can perform
these power sequences for us.

Boot logs (with LOG_DEBUG and CONFIG_K3_BIST enabled) and DT node kept (already
merged to ti-k3-dts-next [3]):
https://gist.github.com/nehamalcom/3fed504d038b54e3e05ba3874d73d603

[1] https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/sdl/sdl_docs/userguide/j721e/modules/pbist.html#introduction
[2] https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/sdl/sdl_docs/userguide/j721e/modules/lbist.html#introduction
[3] https://lore.kernel.org/all/175205725858.918402.3771835070085533874.b4-ty@ti.com/

Link: https://lore.kernel.org/r/20250716062156.2564297-1-n-francis@ti.com
2025-07-24 13:30:20 -06:00
Bryan BrattlofandTom Rini 6d68ac9730 arm: dts: k3: use SPL_TEXT_BASE for R5 SPL load address
The load address for the R5's SPL is defined in Kconfig by
SPL_TEXT_BASE. Rather than hard coding the load address which could
lead to hard to debug issues if this value is changed, just use the
SPL_TEXT_BASE value.

Reviewed-by: Andrew Davis <afd@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2025-07-24 13:30:20 -06:00
Rebecca CranandTom Rini a70bbc4436 arm: dts: ast2600.dtsi: Fix typo of uart11 reg address
The uart11 reg address was a copy of the value for uart10.
Update it to the correct value.

Signed-off-by: Rebecca Cran <rebecca@os.amperecomputing.com>
2025-07-24 13:30:20 -06:00
Andrew GoodbodyandTom Rini 8f3820dc3a fs: exfat: Remove unused label code
Smatch reported a possible buffer overflow in exfat_set_label but it
turns out that this code is unused so just guard the function with
'#ifndef __UBOOT__' as well as exfat_get_label that is also unused and
the helper static find_label.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-07-24 13:30:20 -06:00
Andrew GoodbodyandTom Rini 5c0827eede sandbox: eth-raw: Prevent possible buffer overflow
Instead of strcpy which is unbounded use strlcpy to ensure that the
receiving buffer cannot be overflowed.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-07-24 13:30:20 -06:00
Sam ProtsenkoandTom Rini 70a4d1fa1d treewide: Remove empty board_init() function from all boards
Commit 86acdce2ba ("common: add config for board_init() call")
introduced CONFIG_BOARD_INIT option. This option can be disabled for the
boards where board_init() function is not needed. Remove empty
board_init() calls for all boards where it's possible, and disable
CONFIG_BOARD_INIT in all related defconfigs.

This cleanup was made semi-automatically using these scripts: [1].

No functional change, but the binary size for the modified boards is
reduced a bit.

[1] https://github.com/joe-skb7/uboot-convert-scripts/tree/master/remove-board-init

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm_beacon
Tested-by: Bryan Brattlof <bb@ti.com>
Acked-by: Peng Fan <peng.fan@nxp.com>  #NXP boards
2025-07-24 13:30:19 -06:00
Neha Malcom FrancisandTom Rini a7ddab97aa arm: mach-k3: j784s4_init: Trigger LBIST and PBIST on MAIN R5 2_0
Trigger all tests of PBIST and LBIST using appropriate calls to set the
core under test (MAIN R5 2_0) to it's required state.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2025-07-24 11:50:21 -06:00
Neha Malcom FrancisandTom Rini b56066e03c drivers: misc: k3_bist: Add K3 BIST driver
Add a driver for the BIST module that support triggering of both PBIST
(Memory BIST) and LBIST (Logic BIST) tests. Also expose the relevant
operations and functions that would be required for an end user to
trigger the tests.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2025-07-24 11:50:21 -06:00
Andrew GoodbodyandTom Rini 70bf6e33e1 uclass: Cleanup uclass_find_next_device
uclass_find_next_device always returns 0, so instead make it a void and
update calling sites.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-07-24 11:49:18 -06:00
Tom Rini 7bf2a52b49 Merge tag 'xilinx-for-v2025.10-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2025.10-rc1 v2

zynqmp:
- Generate fit-dtb.blob all the time
- Simplify power-domain driver bind

zynqmp_mini:
- Remove PSCI_RESET

fpga:
- Improve user feedback in case of FPGA bitstream load failure

misc:
- Fix kernel-doc in gpio zynq and axi_mrmac

spi:
- Revert fix in STIG mode

[trini: Remove CONFIG_FPGA_VERSALPL=y from sandbox due to
        sandbox+clang+asan test problem]
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-24 08:56:38 -06:00
Tom Rini 47b4a9b1a6 Merge tag 'mmc-master-2025-07-24' of https://source.denx.de/u-boot/custodians/u-boot-mmc
CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/27140

- Fix emmc error state after mmc write timeout
- Minor cleanup s5p_sdhci
- Support DT upstream for exynos5420 and exynos4210 mmc
2025-07-24 07:54:20 -06:00
Fabio Estevam b40c9b0c22 imx93_frdm: Add initial board support
Add the initial board support for the NXP i.MX93 FRDM board:

https://www.nxp.com/design/design-center/development-boards-and-designs/frdm-i-mx-93-development-board:FRDM-IMX93

Based on the NXP U-Boot code.

There were attempts to upstream the board devicetree, but it has not been
accepted upstream yet:

https://lore.kernel.org/linux-arm-kernel/20250526-fpg-nxp-imx93-frdm-v2-2-e5ad0efaec33@pengutronix.de/

Once it reaches upstream, we can switch to OF_UPSTREAM.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-07-24 08:01:03 -03:00
Ye LiandFabio Estevam 10b6d472d2 spl: spl_imx_container: Delete uninitialized variable
The 'overhead' variable is uninitialized and actually shall not be used.
Delete it to fix coverity CID 37041718 - Uninitialized scalar variable.

Fixes: 73c40fcb73 ("spl: Refactor spl_load_info->read to use units of bytes")
Reported-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-07-24 08:00:47 -03:00
Fabio Estevam e01fa565df imx93_evk: Remove PMIC and USB header files
There is no PMIC and USB related C code in this file.

Remove these unneeded header files.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-07-24 08:00:28 -03:00
Fabio Estevam 98eae17dd3 imx93_evk: Remove unneeded header files
There is nothing in this file that makes use of the definitions from
sizes.h and stringify.h.

Remove them.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-07-24 08:00:28 -03:00
Fabio Estevam eb6d649065 imx93_evk: Fix the board name in MAINTAINERS title
The board name is "i.MX93 EVK", not "MEK".

Fix it accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2025-07-24 08:00:28 -03:00
Andrew GoodbodyandFabio Estevam 110a23e479 imx93: adc: local variable ret should not be unsigned
Local variable ret is declared as unsigned but is used to receive the
return value of functions that return int. ret is then tested for being
negative which must always fail. Change ret to be an int.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-07-24 08:00:08 -03:00
Yannic MoogandFabio Estevam e6e8c601ed board: phytec: migrate imx8mm boards to standard boot
remove boot logic from shared env file for phyboard-polis and
phygate-tauri.
Adjust configs for both boards as well.
Space at the beginning of addressable RAM is reserved for space used via
standard boot env variables. CONFIG_SYS_LOAD_ADDR is set to the lowest
address behind the standard boot variables reserved space.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
2025-07-24 07:59:49 -03:00
Frieder SchrempfandFabio Estevam 4a9d6b2e1d imx: power-domain: Fix crash due to uninitialized 'id' field
In case of the i.MX8M power-domains (i.MX8MQ, MM, MN) there is only
one power-domain for each device. Therefore the 'id' field in struct
power_domain should always be zero.

Currently if a power-domain is accessed after the initial bind, the
'id' field is left uninitialized. This didn't cause any problems
until the following commits were introduced:

9086b64ca0 ("power-domain: Add support for refcounting (again)")
a785ef2448 ("imx: power-domain: Enable refcounting on imx8mp")

Now the 'id' field gets accessed in the power_domain_off() sequence
and the invalid value causes "Synchronous Abort" failures.

This was observed on a i.MX8MM board when running "usb start" and
then "usb stop".

Fix this issue by setting power_domain->id to '0' in
imx8m_power_domain_of_xlate().

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Fixes: d08a194871 ("imx: add support for i.MX8MQ power domain controller")
Fixes: 9086b64ca0 ("power-domain: Add support for refcounting (again)")
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-07-24 07:59:22 -03:00
Frieder SchrempfandFabio Estevam 25140f8908 configs: imx6dl_sielaff: Set CONFIG_SDP_LOADADDR to fix SDP boot
We need to set CONFIG_SDP_LOADADDR to a reasonable value in order
to successfully load the U-Boot proper image in SPL via SDP.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
2025-07-24 07:58:59 -03:00
Frieder SchrempfandFabio Estevam 7056aad696 imx6dl-sielaff: Convert to OF_UPSTREAM
Switch to OF_UPSTREAM to make use of the upstream devicetree.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-07-24 07:58:59 -03:00
Vitor SoaresandFabio Estevam cada57d5b9 toradex: tdx-cfg-block: add verdin i.mx8m mini 0216 pid4
Add PID4 0216 Verdin iMX8M Mini Quad 2GB WB IT to config block handling.

Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2025-07-24 07:56:31 -03:00
Primoz FiserandFabio Estevam 51b140f9f3 board: phytec: phycore-imx93: Drop unused include files
Drop unused include files from the PHYTEC phyCORE-i.MX93 board code.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2025-07-24 07:56:14 -03:00
Primoz FiserandFabio Estevam 10322524bb board: phytec: phycore-imx93: Drop unused PMIC define
Drop unused define for PCA9450 PMIC register which is already part of
the header file <power/pca9450.h> since commit 1d0d257043 ("imx93_evk:
spl: update pmic settings").

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2025-07-24 07:56:14 -03:00
Michal Simek 27fa1e2c17 firmware: zynqmp: Simplify power-domain driver bind
CONFIG_IS_ENABLED macro is covering CONFIG_POWER_DOMAIN or
CONFIG_SPL_POWER_DOMAIN Kconfig symbols based on build target which
simplify logic around binding power domain driver.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c75627e92eeaffedf0f7e682edd4f6f39f0b5706.1752826352.git.michal.simek@amd.com
2025-07-24 09:06:52 +02:00
Michal Simek 7ad14936e3 arm64: zynqmp: Let fit-dtb.blob generated all the time
There is a value to generate fit-dtb.blob even for cases without SPL
because flows with FSBL also require it.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c2952da3c064d67821cd166d2392db39c1d23b2c.1752822270.git.michal.simek@amd.com
2025-07-24 09:05:40 +02:00
Prasanth Babu MantenaandMichal Simek e6345dfc2a Revert "spi: cadence_qspi: Fix odd byte write issue in STIG mode"
The buffer that is being used to write into the flash needs
to be handled properly with padding of 0xFF. The place that
this is done can be at a more generic place like spi-nor core.

This reverts commit cd91235070.

Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250716070407.2082524-1-p-mantena@ti.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-07-24 09:04:04 +02:00