armv7: Add CPLD support via IFC to the ls1021a-iot board.
This patch adds CPLD support via IFC to the ls1021a-iot board. Signed-off-by: Mateus Lima Alves <mateuslima.ti@gmail.com>
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committed by
Peng Fan
parent
431f1ce46b
commit
424b324165
@@ -44,6 +44,40 @@
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#define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL
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#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
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/* CPLD */
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#define CFG_SYS_CPLD_BASE 0x7fb00000
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#define CPLD_BASE_PHYS CFG_SYS_CPLD_BASE
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#define CFG_SYS_FPGA_CSPR_EXT (0x0)
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#define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | \
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CSPR_PORT_SIZE_8 | \
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CSPR_MSEL_GPCM | \
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CSPR_V)
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#define CFG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024)
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#define CFG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \
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CSOR_NOR_NOR_MODE_AVD_NOR | \
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CSOR_NOR_TRHZ_80)
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/* CPLD Timing parameters for IFC GPCM */
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#define CFG_SYS_FPGA_FTIM0 (FTIM0_GPCM_TACSE(0xf) | \
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FTIM0_GPCM_TEADC(0xf) | \
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FTIM0_GPCM_TEAHC(0xf))
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#define CFG_SYS_FPGA_FTIM1 (FTIM1_GPCM_TACO(0xff) | \
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FTIM1_GPCM_TRAD(0x3f))
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#define CFG_SYS_FPGA_FTIM2 (FTIM2_GPCM_TCS(0xf) | \
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FTIM2_GPCM_TCH(0xf) | \
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FTIM2_GPCM_TWP(0xff))
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#define CFG_SYS_FPGA_FTIM3 0x0
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#define CFG_SYS_CSPR0_EXT CFG_SYS_FPGA_CSPR_EXT
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#define CFG_SYS_CSPR0 CFG_SYS_FPGA_CSPR
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#define CFG_SYS_AMASK0 CFG_SYS_FPGA_AMASK
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#define CFG_SYS_CSOR0 CFG_SYS_FPGA_CSOR
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#define CFG_SYS_CS0_FTIM0 CFG_SYS_FPGA_FTIM0
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#define CFG_SYS_CS0_FTIM1 CFG_SYS_FPGA_FTIM1
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#define CFG_SYS_CS0_FTIM2 CFG_SYS_FPGA_FTIM2
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#define CFG_SYS_CS0_FTIM3 CFG_SYS_FPGA_FTIM3
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/*
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* Serial Port
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*/
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