/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2026 BayLibre, SAS.
 * Author: Julien Masson <jmasson@baylibre.com>
 */

#ifndef _REGULATOR_MT6357_H_
#define _REGULATOR_MT6357_H_

#define MT6357_REGULATOR_DRIVER	"mt6357_regulator"

enum {
	/* Bucks */
	MT6357_ID_VCORE,
	MT6357_ID_VMODEM,
	MT6357_ID_VPA,
	MT6357_ID_VPROC,
	MT6357_ID_VS1,

	/* LDOs */
	MT6357_ID_VAUX18,
	MT6357_ID_VAUD28,
	MT6357_ID_VCAMA,
	MT6357_ID_VCAMD,
	MT6357_ID_VCAMIO,
	MT6357_ID_VCN18,
	MT6357_ID_VCN28,
	MT6357_ID_VCN33_BT,
	MT6357_ID_VCN33_WIFI,
	MT6357_ID_VDRAM,
	MT6357_ID_VEFUSE,
	MT6357_ID_VEMC,
	MT6357_ID_VFE28,
	MT6357_ID_VIBR,
	MT6357_ID_VIO18,
	MT6357_ID_VIO28,
	MT6357_ID_VLDO28,
	MT6357_ID_VMC,
	MT6357_ID_VMCH,
	MT6357_ID_VRF12,
	MT6357_ID_VRF18,
	MT6357_ID_VSIM1,
	MT6357_ID_VSIM2,
	MT6357_ID_VSRAM_OTHERS,
	MT6357_ID_VSRAM_PROC,
	MT6357_ID_VUSB33,
	MT6357_ID_VXO22,
};

/* PMIC Registers */
#define MT6357_BUCK_TOP_CLK_CON0		0x140c
#define MT6357_BUCK_TOP_CLK_HWEN_CON0		0x1412
#define MT6357_BUCK_TOP_CLK_MISC_CON0		0x1418
#define MT6357_BUCK_TOP_INT_CON0		0x141a
#define MT6357_BUCK_TOP_INT_MASK_CON0		0x1420
#define MT6357_BUCK_TOP_SLP_CON0		0x142c
#define MT6357_BUCK_TOP_OC_CON0			0x1434
#define MT6357_BUCK_TOP_K_CON0			0x1436
#define MT6357_BUCK_VPROC_CON0			0x1488
#define MT6357_BUCK_VPROC_DBG0			0x14a2
#define MT6357_BUCK_VPROC_ELR0			0x14aa
#define MT6357_BUCK_VCORE_CON0			0x1508
#define MT6357_BUCK_VCORE_DBG0			0x1522
#define MT6357_BUCK_VCORE_ELR0			0x152a
#define MT6357_BUCK_VMODEM_CON0			0x1588
#define MT6357_BUCK_VMODEM_DBG0			0x15a2
#define MT6357_BUCK_VMODEM_ELR0			0x15aa
#define MT6357_BUCK_VS1_CON0			0x1608
#define MT6357_BUCK_VS1_DBG0			0x1622
#define MT6357_BUCK_VS1_ELR0			0x1632
#define MT6357_BUCK_VPA_CON0			0x1688
#define MT6357_BUCK_VPA_CON1			0x168a
#define MT6357_BUCK_VPA_DBG0			0x1692
#define MT6357_BUCK_VPA_DLC_CON0		0x1698
#define MT6357_BUCK_VPA_MSFG_CON0		0x169e
#define MT6357_LDO_TOP_CLK_DCM_CON0		0x188c
#define MT6357_LDO_TOP_CLK_VIO28_CON0		0x188e
#define MT6357_LDO_TOP_CLK_VIO18_CON0		0x1890
#define MT6357_LDO_TOP_CLK_VAUD28_CON0		0x1892
#define MT6357_LDO_TOP_CLK_VDRAM_CON0		0x1894
#define MT6357_LDO_TOP_CLK_VSRAM_PROC_CON0	0x1896
#define MT6357_LDO_TOP_CLK_VSRAM_OTHERS_CON0	0x1898
#define MT6357_LDO_TOP_CLK_VAUX18_CON0		0x189a
#define MT6357_LDO_TOP_CLK_VUSB33_CON0		0x189c
#define MT6357_LDO_TOP_CLK_VEMC_CON0		0x189e
#define MT6357_LDO_TOP_CLK_VXO22_CON0		0x18a0
#define MT6357_LDO_TOP_CLK_VSIM1_CON0		0x18a2
#define MT6357_LDO_TOP_CLK_VSIM2_CON0		0x18a4
#define MT6357_LDO_TOP_CLK_VCAMD_CON0		0x18a6
#define MT6357_LDO_TOP_CLK_VCAMIO_CON0		0x18a8
#define MT6357_LDO_TOP_CLK_VEFUSE_CON0		0x18aa
#define MT6357_LDO_TOP_CLK_VCN33_CON0		0x18ac
#define MT6357_LDO_TOP_CLK_VCN18_CON0		0x18ae
#define MT6357_LDO_TOP_CLK_VCN28_CON0		0x18b0
#define MT6357_LDO_TOP_CLK_VIBR_CON0		0x18b2
#define MT6357_LDO_TOP_CLK_VFE28_CON0		0x18b4
#define MT6357_LDO_TOP_CLK_VMCH_CON0		0x18b6
#define MT6357_LDO_TOP_CLK_VMC_CON0		0x18b8
#define MT6357_LDO_TOP_CLK_VRF18_CON0		0x18ba
#define MT6357_LDO_TOP_CLK_VLDO28_CON0		0x18bc
#define MT6357_LDO_TOP_CLK_VRF12_CON0		0x18be
#define MT6357_LDO_TOP_CLK_VCAMA_CON0		0x18c0
#define MT6357_LDO_TOP_CLK_TREF_CON0		0x18c2
#define MT6357_LDO_TOP_INT_CON0			0x18c4
#define MT6357_LDO_TOP_INT_MASK_CON0		0x18d0
#define MT6357_LDO_TEST_CON0			0x18e4
#define MT6357_LDO_TOP_WDT_CON0			0x18e6
#define MT6357_LDO_TOP_RSV_CON0			0x18e8
#define MT6357_LDO_VXO22_CON0			0x1908
#define MT6357_LDO_VAUX18_CON0			0x191c
#define MT6357_LDO_VAUD28_CON0			0x1930
#define MT6357_LDO_VIO28_CON0			0x1944
#define MT6357_LDO_VIO18_CON0			0x1958
#define MT6357_LDO_VDRAM_CON0			0x196c
#define MT6357_LDO_VEMC_CON0			0x1988
#define MT6357_LDO_VUSB33_CON0_0		0x199c
#define MT6357_LDO_VSRAM_PROC_CON0		0x19b2
#define MT6357_LDO_VSRAM_PROC_DBG0		0x19cc
#define MT6357_LDO_VSRAM_OTHERS_CON0		0x19d0
#define MT6357_LDO_VSRAM_OTHERS_DBG0		0x19ea
#define MT6357_LDO_VSRAM_WDT_DBG0		0x19f6
#define MT6357_LDO_VSRAM_CON0			0x19fa
#define MT6357_LDO_VSRAM_CON1			0x19fc
#define MT6357_LDO_VFE28_CON0			0x1a08
#define MT6357_LDO_VRF18_CON0			0x1a1c
#define MT6357_LDO_VRF12_CON0			0x1a30
#define MT6357_LDO_VEFUSE_CON0			0x1a44
#define MT6357_LDO_VCN18_CON0			0x1a58
#define MT6357_LDO_VCAMA_CON0			0x1a6c
#define MT6357_LDO_VCAMD_CON0			0x1a88
#define MT6357_LDO_VCAMIO_CON0			0x1a9c
#define MT6357_LDO_VMC_CON0			0x1ab0
#define MT6357_LDO_VMCH_CON0			0x1ac4
#define MT6357_LDO_VSIM1_CON0			0x1ad8
#define MT6357_LDO_VSIM2_CON0			0x1aec
#define MT6357_LDO_VIBR_CON0			0x1b08
#define MT6357_LDO_VCN33_CON0_0			0x1b1c
#define MT6357_LDO_VCN33_CON0_1			0x1b2a
#define MT6357_LDO_VLDO28_CON0_0		0x1b32
#define MT6357_LDO_GOFF2_RSV_CON0		0x1b48
#define MT6357_LDO_VCN28_CON0			0x1b88
#define MT6357_LDO_TREF_CON0			0x1b9e
#define MT6357_LDO_GOFF3_RSV_CON0		0x1bae
#define MT6357_VXO22_ANA_CON0			0x1c18
#define MT6357_VCN33_ANA_CON0			0x1c1c
#define MT6357_VEMC_ANA_CON0			0x1c20
#define MT6357_VLDO28_ANA_CON0			0x1c24
#define MT6357_VIBR_ANA_CON0			0x1c2c
#define MT6357_VSIM1_ANA_CON0			0x1c30
#define MT6357_VSIM2_ANA_CON0			0x1c34
#define MT6357_VMCH_ANA_CON0			0x1c38
#define MT6357_VMC_ANA_CON0			0x1c3c
#define MT6357_VUSB33_ANA_CON0			0x1c88
#define MT6357_VCAMA_ANA_CON0			0x1c8c
#define MT6357_VEFUSE_ANA_CON0			0x1c90
#define MT6357_VCAMD_ANA_CON0			0x1c94
#define MT6357_VDRAM_ELR_2			0x1cac

#endif
