// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2026 NXP
 */

#include "imx95-u-boot.dtsi"

/ {
	aliases {
		pci0 = &netc_bus0;
		pci1 = &netc_bus1;
	};
};

&{/binman/m33-oei-ddrfw/imx-lpddr/imx-lpddr-imem} {
	filename = "lpddr4x_imem_v202409.bin";
};

&{/binman/m33-oei-ddrfw/imx-lpddr/imx-lpddr-dmem} {
	filename = "lpddr4x_dmem_v202409.bin";
};

&{/binman/m33-oei-ddrfw/imx-lpddr-qb/imx-lpddr-imem-qb} {
	filename = "lpddr4x_imem_qb_v202409.bin";
};

&{/binman/m33-oei-ddrfw/imx-lpddr-qb/imx-lpddr-dmem-qb} {
	filename = "lpddr4x_dmem_qb_v202409.bin";
};

&lpuart1 {
	bootph-pre-ram;
};

&reg_usdhc2_vmmc {
	bootph-pre-ram;
};

&usdhc1 {
	bootph-pre-ram;
};

&usdhc2 {
	bootph-pre-ram;
};

&pinctrl_uart1 {
	bootph-pre-ram;
};

&pinctrl_usdhc1 {
	bootph-pre-ram;
};

&pinctrl_usdhc1_100mhz {
	bootph-pre-ram;
};

&pinctrl_usdhc1_200mhz {
	bootph-pre-ram;
};

&pinctrl_usdhc2 {
	bootph-pre-ram;
};

&pinctrl_usdhc2_100mhz {
	bootph-pre-ram;
};

&pinctrl_usdhc2_200mhz {
	bootph-pre-ram;
};

&pinctrl_usdhc2_gpio {
	bootph-pre-ram;
};

&pinctrl_reg_usdhc2_vmmc {
	bootph-pre-ram;
};
