// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Copyright (C) 2025 MediaTek Inc.
 * Author: Sam.Shih <sam.shih@mediatek.com>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/mt65xx.h>

&pio {
	/delete-node/ mmc-pins-default;
	/delete-node/ mmc-pins-uhs;
	/delete-node/ sd-pins-default;
	/delete-node/ sd-pins-uhs;
	/delete-node/ spi0-pins;
	/delete-node/ spi2-pins;

	mmc_pins_default: mmc0default {
		mux {
			function = "flash";
			groups = "emmc_45";
		};

		conf-cmd-dat {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO",
			       "SPI0_CS", "SPI0_HOLD", "SPI0_WP",
			       "SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
			input-enable;
			drive-strength = <MTK_DRIVE_4mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
		};

		conf-clk {
			pins = "SPI1_CS";
			drive-strength = <MTK_DRIVE_6mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
		};

		conf-rst {
			pins = "USB_VBUS";
			drive-strength = <MTK_DRIVE_4mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
		};
	};

	mmc_pins_uhs: mmc-pins-uhs {
		mux {
			function = "flash";
			groups = "emmc_45";
		};
		conf-cmd-dat {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO",
			       "SPI0_CS", "SPI0_HOLD", "SPI0_WP",
			       "SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
			input-enable;
			drive-strength = <MTK_DRIVE_4mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
		};
		conf-clk {
			pins = "SPI1_CS";
			drive-strength = <MTK_DRIVE_6mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
		};
		conf-rst {
			pins = "USB_VBUS";
			drive-strength = <MTK_DRIVE_4mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
		};
	};

	sd_pins_default: sd-pins-default {
		mux {
			function = "flash";
			groups = "sd";
		};
		conf-cmd-dat {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO",
			       "SPI0_CS", "SPI1_MISO";
			input-enable;
			drive-strength = <MTK_DRIVE_4mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
		};
		conf-clk {
			pins = "SPI1_CS";
			drive-strength = <MTK_DRIVE_6mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
		};
	};

	sd_pins_uhs: sd-pins-uhs {
		mux {
			function = "flash";
			groups = "sd";
		};
		conf-cmd-dat {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO",
			       "SPI0_CS", "SPI1_MISO";
			input-enable;
			drive-strength = <MTK_DRIVE_4mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
		};
		conf-clk {
			pins = "SPI1_CS";
			drive-strength = <MTK_DRIVE_6mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
		};
	};

	spi0_flash_pins: spi0-pins {
		mux {
			function = "spi";
			groups = "spi0", "spi0_wp_hold";
		};

		conf-pu {
			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
		};

		conf-pd {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
		};
	};

	spi2_flash_pins: spi2-pins {
		mux {
			function = "spi";
			groups = "spi2", "spi2_wp_hold";
		};

		conf-pu {
			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
		};

		conf-pd {
			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
		};
	};
};
